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LC-37SD1E/RU
5 – 14
2.6. IC1710 (RH-IXB823WJZZQ)
2.6.1 Block Diagram
2.6.2 Pin Connections and short description
Pin No.
Pin Name
I/O
Pin Function
Sheet Name
1
EXP [7]
O
Outport [7] (I2C SEL signal)
DTI2CSEL
2
EXP [6]
O
Outport [6] (Digital circuit reset signal)
DTM_RESET
3
EXP [5]
O
Outport [5] (Digital circuit power control signal)
DTV_ON
4
GND*
–
Ground
N.C.
5
EXP [3]
O
Outport [3] (Inverter ON control signal)
BL_ON
6
GND*
–
Ground
N.C.
7
OFLOUT
O
OFL signal output
OFLOUT
8
OSCOUT
O
OSC signal output
OSCOUT
9
VCCIO1
–
VCC (3.3V)
FPGA_VCC
10
GNDIO
–
Ground
Ground.
11
GNDINT
–
ground.
Ground.
12
PCLK
I
Reference clock input
PCLK
13
VCCINT
–
VCC (3.3V)
FPGA_VCC
14
GCLR
I
RESET terminal. L: RESET, H: Normal
RESET_N
15
GND*
–
N.C.
N.C.
16
GND*
–
N.C.
N.C.
17
GND*
–
N.C.
N.C.
18
GND*
–
N.C.
N.C.
19
GND*
–
N.C.
N.C.
20
GND*
–
N.C.
N.C.
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