66DW-18H (serv.man3). Revision 1 - Sharp TV Service Manual (repair manual). Page 11

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Wide Screen, Colour Television   CW100 Chassis
Sharp Electronics (UK) Ltd
Technical Support
February 99
Page 11
MICROPROCESSOR CIRCUIT
This is possible the most complex processor circuit that has been used in a Sharp CTV’s, although it
is using the same processor as the CA10 chassis (the mask is different). The CW100 chassis has
several buses for communicating with all areas, which are:
Parallel bus
Communication between the Main Microprocessor and the EPROM
Two I
2
C buses, 
SDA1 & SCA1, communicates with the 100Hz PWB, SCART PWB, Tuner &
MSP.
SDA2 & SCA2, communicate with the NVM's.
M3 bus.
Communicates with the Megatext chip (similar to the CS chassis with the
addition of an Indent line)
‘D I C’ bus.
Communicates with the Dolby Processor circuit
Reset In.
Main system reset (IC1011).
Two reset out.
First '100Hz PWB Reset' is used by the 100Hz PWB, without this pulse the
line oscillator will not start.
Second 'Secondary Reset’ will reset the MSP, Megatext & the Dolby circuit.
Data In.
Data from Slave Processor, including remote control & keypad commands
Data Out.
Data to Slave Processor
There will be data on any of the buses if the Reset in & the 100Hz reset have not occurred.
Figure 1 - Reset Pulse Timing
100Hz PWB
    Reset
Secondary
   Reset
Main Reset
5V Supply
0V
5V
5V
5V
5V
0V
0V
0V
Line Oscillator Start
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