28LW-92H (serv.man2) - Sharp TV Service Manual (repair manual). Page 18

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CHASSIS
• 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes 
• Partial Page Writes are Allowed 
• Self-timed Write Cycle (10 ms max) 
• High-reliability 
– Endurance: 1 Million Write Cycles 
– Data Retention: 100 Years 
• Automotive Grade and Extended Temperature Devices Available 
• 8-lead JEDEC SOIC, 8-pin PDIP and 8-lead TSSOP Packages 
13.9.3.Pin Configurations 
 
Pin name 
Function 
A0-A2 Address 
Inputs 
SDA Serial 
Data 
SCL 
Serial Clock Input 
WP Write 
Protect 
NC No 
Connect 
 
13.10.SDA5555 
13.10.1.General definition 
The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as 
Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling 
(WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption 
acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible 
Microcontroller with television specific hardware features. Microcontroller has been enhanced to 
provide powerful features such as memory banking, data pointers, and additional interrupts etc. The on-
chip display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen 
displays. Internal XRAM consists of up to 16 Kbytes. Device has an internal ROM of up to 128 KBytes. 
ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a 
wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX 
and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 
TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented 
characters (DRCS). 
13.10.2.Features 
General 
• Feature selection via special function register 
• Simultaneous reception of TTX, VPS, PDC, and WSS (line 23) 
• Supply Voltage 2.5 and 3.3 V 
• ROM version package PSDIP52-2, PMQFP64-1 
• Romless version package PMQFP100-2, PLCC84-2 
 
External Crystal and Programmable Clock Speed 
• Single external 6MHz crystal, all necessary clocks are generated internally 
• CPU clock speed selectable via special function registers. 
• Normal Mode 33.33 MHz CPU clock, Power Save mode 8.33 MHz 
 
Microcontroller Features 
• 8bit 8051 instruction set compatible CPU. 
• 33.33-MHz internal clock (max.) 
• 0.360ms (min.) instruction cycle 
• Two 16-bit timers 
• Watchdog timer 
• Capture compare timer for infrared remote control decoding 
• Pulse width modulation unit (2 channels 14 bit, 6 channels 8 bit) 
• ADC (4 channels, 8 bit) 
• UART 
 
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