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MX-5170FV BLOCK DIAGRAM / ブ ロ ッ ク 図 1 – 8
B.
Japan
TEL
/LIU
C
o
nnect
or
SPI Flash
(N
ot
m
ount
)
D
ia
g
S
o
ft
16
Mbit
LIU JP
N P
W
B
WORK
MEM
ORY
䠄
Not m
oun
t䠅
SDRAM
64
Mb
it
PROGRAM
FLASH RO
M
16
M
b
FA
X MAIN PWB
MJ
1
(L
IN
E
)
MJ
2
(TEL)
OFF fock
det
ect
ion
S rel
a
y
Si301
9
Si
3
056
Sil
icon
DAA
Si305
6 CHIP SET
VOI
CE
CO
DEC
Han
dset
AMP
CI
D
e
te
ct
io
n
p
ara-
ringe
r
vo
ic
e
m
ess
age
Ou
tp
u
t
Spe
aker
CPU
MODEM
PIC
m
icroc
om
put
er
MF
P
IF
Connec
to
r
Wi
th
s
e
cu
re
lock
ing
dev
ic
e
JTAG
C
o
nnec
to
r
1
4pin
(N
o
t m
ount
)
Log
C
o
nnec
to
r
(N
o
t m
ount
)
1W
┬䜶
䝛䝰䞊䝗
ືస
Cr
y
s
tal
Resona
to
r
24.576M
Hz
DC
DC
Cr
yst
al
Resona
to
r
13.333M
Hz
RESET I
C
Hand
set
Connec
to
r
Speaker
Connect
or
S0
2
B
-
PA
SK
ST
AT
US LE
D_
1
ST
AT
US LE
D_
2
(N
ot
m
ount
)
vo
lt
age
le
vel
DCDC
+
150V
Me
ssag
e
Ou
tp
u
t
En
able
Vo
lt
age
Regulator
Power
Ampli
fier
Volume
Chang
e
CI
D
e
te
ct
io
n
(Not
mo
unt
)
vo
lt
age
le
vel
+
24V
D
e
te
ct
io
n
+
24V
䊼
+
12V
CI
F
i䡈
te
r
CI
Fi
䡈te
r
Fil
ter
v
o
lt
age
level
Speaker
M
ic
roph
one
O
F
F
f
o
ck det
ect
io
n
RH
S
-
+5
V
S
EX
H
S
-
SO
N
2
SO
N
1
AF
E_CLK
AF
E
_
R
ES
-
ASP
C
L
K
ABI
TC
LK
AR
XD
AT
X
D
BSP
C
L
K
BBI
TC
LK
BR
XD
BT
X
D
SPK(
a
n
alog)
RG
D
T
-(CI
᳨ฟ
)
HDMUT
E
-
SI
3_RES-
TE
L
ID
CI
2-
CI
-
CI
ON
1
50V
O
N
MS
G
M
U
T
E
M
S
G
(Anal
og)
CI
D-
+5V
S
+1
2
+24
+5
V
+5
V
A
BZ
E
N
_SPKO
N-
EN
_
B
Z
O
N
-
VO
L
A
VO
L
B
VO
LC
VO
LD
SP
MU
TE
-
3.
3V
1.
8V
MDM3.
3V
RE
S
E
T
-
3.
3V
MDM
3.
3V
+3
.3V
+24V
MO
N_24V-
+2
4
V
+5V
+3.
3V
+5V
S
RES_F
AX-
DA
T
A
_RX
D
_
P
DAT
A
_RXD_N
DAT
A_T
X
D
_
P
DAT
A
_T
XD_N
F
A
X_CT
S
(D)-
F
A
X_RT
S
(D)-
FA
X_C
TS(C
S
)-
FA
X_R
TS(C
S
)-
F
L
VPP
MO
DEL I
D
CNCT
_
F
A
X
-
PI
C
P
GM
_
E
N
W
U
P_F
AX-
TE
L
ID
2
16b
it
16b
it
16b
it
SPI
16b
it
JTAG
UART
UART
Downloa
d
LVDS
DA
T
A
_R
X
D
v
o
lt
age
level
MO
DEL I
D
2
DC
DC
DA
T
A
_T
X
D
C
M
D_RX
D_P
C
M
D_RX
D_N
CMD_T
X
D
_P
LVDS
CM
D_R
X
D
CMD_T
XD
CMD_T
XD_N
+1.
2V
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