Read Sharp AR-155 (serv.man13) Service Manual online
5. FAX PWB circuit description (AR-F151
only)
(1) Summary
The FAX PWB performs the following operations:
•
•
Interface with the MCU PWB (Scan data input, print image data out-
put)
put)
•
FAX operation panel control
•
FAX image conversion
•
Interface with the public telephone line
NS FX164 is used as the CPU, and FX200 is used as the system con-
troller. An 8M OTPROM is used as the program ROM, and16M DRAM
as the main memory. To store the registered telephone numbers, etc.,
64K SRAM (backed up by battery) and the clock IC are used.
troller. An 8M OTPROM is used as the program ROM, and16M DRAM
as the main memory. To store the registered telephone numbers, etc.,
64K SRAM (backed up by battery) and the clock IC are used.
LC8213 is used to perform data compression and expansion.
ASIC performs laser printer control and interface with and the MCU
PWB.
The NCU circuit connects with the telephone line.
ASIC performs laser printer control and interface with and the MCU
PWB.
The NCU circuit connects with the telephone line.
(2) CPU section
The NS32FX164 (having 32bit core and 16bit DSP core) is used as the
CPU in combination with the system controller NS32FX200. The 32bit
CPU core is used to control the system. By combination with the 16bit
DSP core and the Sigma Delta Coded circuit in the NS32FX200, the
MODEM function is realized. The NS32FX200 is provided with the
DRAM controller function, the interrupt controller function, the timer
function, and the DMA controller function, which are used to control the
system.
CPU in combination with the system controller NS32FX200. The 32bit
CPU core is used to control the system. By combination with the 16bit
DSP core and the Sigma Delta Coded circuit in the NS32FX200, the
MODEM function is realized. The NS32FX200 is provided with the
DRAM controller function, the interrupt controller function, the timer
function, and the DMA controller function, which are used to control the
system.
(3) Memory
A DRAM of 16M (1M
× 16 bit composition) is used as the main
memory. An 8M OPTROM (512K
× 16 bit composition) is used as the
program memory.
The NJU6355 is used as the clock IC, and 64K SRAM of 8K
The NJU6355 is used as the clock IC, and 64K SRAM of 8K
× 8bit is
used as the configuration memory which stores various settings. These
two IC’s are backed up by a 3V lithium battery even when the AC
power is turned off. The configuration memory is also used as the buff-
er memory in PC-FAX.
two IC’s are backed up by a 3V lithium battery even when the AC
power is turned off. The configuration memory is also used as the buff-
er memory in PC-FAX.
(4) Scanner image storing process
ASIC (LZ9FH19) receives scanner image data processed in the MCU
PWB and stores in the scan data memory.
ASIC outputs image data to the image data bus and performs com-
pression and expansion with LC8213 according to the CPU’s instruc-
tion.
PWB and stores in the scan data memory.
ASIC outputs image data to the image data bus and performs com-
pression and expansion with LC8213 according to the CPU’s instruc-
tion.
(5) Compression, expansion
By combination of LC8213 and 256K SRAM, compression and expan-
sion are performed.
sion are performed.
This IC converts bit map data into coded data in MH, MR, or MMR for-
mat or converts coded data of MH, MR, or MMR format into bit map
data. In FAX sending, bit map data is outputted from LZ9FH19 to the
image bus are coded in MMR format and outputted to the CPU bus.
The coded data are stored in the main memory. In FAX reception, the
coded data are read from the main memory and converted into bit map
data by this IC and outputted to the image bus.
The outputted data are sent through the ASIC to the MCU PWB and
printed. The 256K SRAM connected to the image bus are used as the
buffer memory.
mat or converts coded data of MH, MR, or MMR format into bit map
data. In FAX sending, bit map data is outputted from LZ9FH19 to the
image bus are coded in MMR format and outputted to the CPU bus.
The coded data are stored in the main memory. In FAX reception, the
coded data are read from the main memory and converted into bit map
data by this IC and outputted to the image bus.
The outputted data are sent through the ASIC to the MCU PWB and
printed. The 256K SRAM connected to the image bus are used as the
buffer memory.
(6) ASIC section
This ASIC of about 30,000 gates is composed of the three blocks.
•
•
SCL block: Scanner control and bus control
•
1284 block: Interface section with PC
•
LBP: Laser printer engine control and FIFO memory control
RESET_GEN forms reset signals in ASIC, and CLOCK GEN forms
clock signals in ASIC. HFKDIV divides the basic video frequency in-
putted to the ASIC.
clock signals in ASIC. HFKDIV divides the basic video frequency in-
putted to the ASIC.
SCL block
The SCL block performs scanner control, timing control, and bus con-
trol.
The scanner control block does not use the MCU because the MCU
takes an image data.
The sensor block receives input of the sensor and switch state on the
ADF. The bus control block performs the CPU bus control, image bus
control, and DMA transmission between them. The timing control block
forms CCD clock signals and DMA signals.
trol.
The scanner control block does not use the MCU because the MCU
takes an image data.
The sensor block receives input of the sensor and switch state on the
ADF. The bus control block performs the CPU bus control, image bus
control, and DMA transmission between them. The timing control block
forms CCD clock signals and DMA signals.
CPU NS32FX164
32bit CPU CORE
16bit DSP module
16bit DSP module
System controller NS32FX200
DRAM controller
Interrupt controller
Timer
DMA controller
Sigma Delta Coded
Interrupt controller
Timer
DMA controller
Sigma Delta Coded
Analog
circuit
circuit
NCU
circuit
circuit
Public Telephone line
CPU
Bus
Bus
CPU
Interface
Interface
Compression
Expansion
Image Bus
Interface
Interface
LC8213
Image Bus
256K
SRAM
SRAM
LBP
ECP
SCL
Reset_gen
ASIC
Hfckdiv
Clock gen
Scanner control
Motor control
Lamp modulation
Bus control
DMA control
CAPTURE
Image bus
control
Timing control
Sensors
TC
Ti
m
e
s
lo
t
CCd timing
conrol
conrol
LC8213 Dreq out
ECP Dreq out
C
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Address
FX data in
FX data out
Controls
LBP READY
LBP
DACK/wrne
DACK/wrne
Data tp LBP
Con
tr
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l
FX
A
D
B
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S
Control
Address
FX
data in
data in
FX
data
out
data
out
F
X
dat
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LC
8213
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Ca
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r
on
AR-F151
11 – 19
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