Read Sharp PN-V602 (serv.man7) Service Manual online
CHAPTER 8. HARDWARE DESCRIPTIONS
PN-V602 HARDWARE DESCRIPTIONS
8 – 19
CN6
IF-PWB
40
LCD_
PORT4
Open (Not used)
41
nROM_
WP
U/D signal (Not used)
CN7
IF-PWB
1
GND
GND
2
APL_
OFFSET
OFFSET (R/G/B)
signal (PWM signal
for setting the LED
minimum lighting
minimum lighting
ratio) for APL
3
APL_
OUT-
SCALE
OUTSCALE (R/G/B)
signal (PWM signal
for setting the LED
maximum lighting
maximum lighting
ratio) for APL
4
nPNL_
PWR_ON
LCD-TCON PWB
power ON signal
5
RXD_MB
UART receive data
signal
6
TXD_MB
UART send data sig-
nal
7
GND
GND
8
SCL_MB
I2C clock signal
(open)
(open)
9
SDA_MB
I2C data signal (open)
10
GND
GND
11
nPOW_
ON
LED power ON signal
12
nLED_
ON
LED driver output
enable signal
enable signal
13
nTCON_
RDY
LED_TCON PWB
ready signal
ready signal
14
nLED_
ERR
LED_TCON error sig-
nal
nal
15
nEXT_
RST
External Reset signal
16
nRST_
FP_EN
FPGA reset enable
signal
signal
17
nLED_
PORT1
Sub micon flash
rewriting foe signal
rewriting foe signal
18
GND
GND
CN8
LED-Driver PWB
1 - 4
N.C.
5, 6
LED_
DR_VIN
+12V power supply
7
GND
GND
8, 9
VCC3.3V
+3.3V power supply
10
nDCDC_
EN
DCDC enable signal
11
VCC_
LED
Open
12
GATE2
SPI IF GATE2 signal
13
GATE1
SPI IF GATE1 signal
14
GATE0
SPI IF GATE0 signal
15
GND
GND
16
CSA2
SPI IF CS2 signal
CN No.
Pin No.
Symbol
Function
CN8
LED-Driver PWB
17
CSA1
SPI IF CS1 signal
18
CSA0
SPI IF CS0 signal
19
EN
iWatt Enable signal
20
GND
GND
21
VSYNC_
1
iWatt Vertical SYNC
signal 1
22
VSYNC_
0
iWatt Vertical SYNC
signal 0
23
SCK_1
SPI CLK1 signal
24
SCK_0
SPI CLK0 signal
25
GND
GND
26
MOSI_1
SPI data output signal
1
27
MOSI_0
SPI data output signal
0
28
GND
GND
29
MISO_1
SPI data input signal
1
1
30
MISO_0
SPI data input signal
0
0
CN9
LED power
LED power
1
ADJ_Ach
Open (DAC output
Ach for LED power
Ach for LED power
adjustment: For
reserved power
source)
source)
2
ADJ_Bch
Open (DAC output
Bch for LED power
Bch for LED power
adjustment: For
reserved power
source)
3
ADJ_Cch
Open (DAC output
Cch for LED power
adjustment: For
adjustment: For
reserved power
source)
4
GND
GND
CN10
EEPROM writing
1
GND
GND
2
SCL
I2C clock signal
3
SDA
I2C data signal
4
NC
(No Via
Hole)
5
NC
6
WP
Write protect signal
7
A0_C
Open
8
A0_M
Slave address bits [3]
for EEPROM writing
9
VCC
+3.3V power supply
CN11
FPGA config
ROM writing
1
TCK
Clock signal for FPGA
writing
2
NC
(No Via
Hole)
3
TDO
Output data signal for
FPGA writing
CN No.
Pin No.
Symbol
Function
Click on the first or last page to see other PN-V602 (serv.man7) service manuals if exist.