LL-T1610W (serv.man11). LLT1610W Complete - Sharp Monitor Service Manual (repair manual). Page 22

possible to rewrite the boot area).

The VPPEN signal is used to mask the WE signal of flash memory,
instead of controls the VPP of flash memory (VPP is always applied).

Therefore, when the VPPEN is at low level, data cannot be written to
flash memory and no command is issued.

The IR decoder of the PW164 has 2 lines of input.

This model does not use the IR decoder.

On the PW164, the DCK is 108 MHz and MCK is 129.6 MHz.

The AD9884A converts the analog RGB output from the PC to digital
48-bit data and outputs it to the PW164.

Data from the PC is compatible with a dot clock of up to 140 MHz.
The AD 9884A can receive up to 75 MHz (dot clock of 135 MHz) at
SXGA.

The AD9884A is controlled by the I

2

C (slave address 9AH/9BH).

In the power save mode including the DPMS mode, the AD9884A is
put in the power-down mode by the XVPWDN signal (general port of
the PW164).

The AD9884A is connected to the PW164 with the dual channel
mode (48 bits).

The SiI151A converts serial data outputted from the PC into digital
48-bit data and then outputs it to the PW164.

In the power save mode including the DPMS mode, the SiI151A is
put in the power-down mode by the TMDSON signal (general port of
the PW164).

There is no software-controlled item other than the power-down
mode.

For the program ROM, an 8-Mbit flash memory LH28F800BVE is
used. The LH28F800BVE consists of two 4K-word boot block, six
4K-word parameter block and 15 32K-word main block.

Put the VPPEN signal (PW164 general port) in High level before
issuing the command or writing data to flash memory.

A 16-Kbit E

2

PROM HN58x2416 is used for storing data such as user

information. 

The HN58x2416 uses I

2

C for reading and writing data.

The slave addresses for the HN58x2416 are A0H - AFH and they
need to be changed according to memory addresses which data is
read from or written to.

The WP (write protect) pin of the HN58x2416 is not used and thus it
is possible to rewrite all areas.

The M62334, a 4-channel, 8-bit DA converter which is controlled by
the I

2

C, controls the backlight and LED. (slave addresses 98H/99H).

The output of the M62334 is set as follows:

D7

D6

D5

D4

D3

D2

D1

D0

M62334 output

0

0

0

0

0

0

0

0

Vcc/256   1

0

0

0

0

0

0

0

1

Vcc/256: 2

0

0

0

0

0

0

1

0

Vcc/256   3

...

...

...

...

...

...

...

...

...

1

1

1

1

1

1

1

0

Vcc/256   255

1

1

1

1

1

1

1

1

Vcc

Vcc=3.3V

Each channel is connected as follows:

Signal name

Connected to

Function

A01

VBR

Inverter

Sets backlight lighting

00: brightness max.
7F: brightness min 

A02

BACKON

Inverter

Inverter ON/OFF

00: inverter OFF
FF: inverter ON

A03

LEDG

LED Green

LED Green ON/OFF

00: LED ON
FF: LED OFF

A04

LEDR

LED Red

LED Red ON/OFF

00: LED ON
FF: LED OFF

: DAC channels are set to 00h after resetting.

: The "brightness min." of the backlight is a temporary value (about

20%).

A 1-Kbit E

2

PROM BR24C21 is used for analog DDC, and a 1-Kbit

E

2

PROM BR24C01A is used for digital DDC.

Analog supports DDC1/DDC2B, and digital supports DDC2B alone.

In the DDC1 mode, data can be read from the SDA (RGSA) by
inputting a clock to the VCLK (GVS1).

In the DDC1 mode after the power is turned on, data can be read in
the order of "last address", "0h address data", and "1h address data"
with addresses automatically incremented.

When the SCL (RGSL) is changed from H to L, the DDC1 mode is
changed to DDC2B mode after this clock.

To change the DDC2B mode to the DDC1 mode, turn the power off
and on again.

Digital supports DDC2B mode alone.