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DV-700S
DV-760S/H
DV-760S/H
Pin No.
Pin name
Type
Direction
Function
Video8 register = 0
Color difference signal output terminal of 2th bit.
Video8 register = 1
It works as the OSD pallet data input terminal of 2rd bit.
Video8 register = 0
Color difference signal output terminal of 1th bit.
Video8 register = 1
It works as the OSD pallet data input terminal of 1rd bit.
Video8 register = 0
Color difference signal output terminal of 0th bit.
Video8 register = 1
It works as the OSD pallet data input terminal of 0rd bit.
Color difference signal output terminal of 2th bit.
Video8 register = 1
It works as the OSD pallet data input terminal of 2rd bit.
Video8 register = 0
Color difference signal output terminal of 1th bit.
Video8 register = 1
It works as the OSD pallet data input terminal of 1rd bit.
Video8 register = 0
Color difference signal output terminal of 0th bit.
Video8 register = 1
It works as the OSD pallet data input terminal of 0rd bit.
109
C2
3-S
O
(OSDPEL2)
(3-S)
(I)
110
C1
3-S
O
(OSDPEL1)
(3-S)
(I)
111
C0
3-S
O
(OSDPEL0)
(3-S)
(I)
Video/OSD interface terminal list
Video interface · OSD interface
Pin No.
Pin name
Type
Direction
Function
Clock gained by dividing VCLK x 2 signal into halves.
Input terminal to switch video master/slave.
VMASTER=L
Video master mode. Video synchronizing signal and video clock are
internally generated.
HTYPE=H
Video slave mode. Video synchronizing signal and video clock are re
ceived from the external.
Video output enable input terminal
VDEN#=H
Y [7:0] and C [7:0] terminals are made to be disable (3-state).
VDEN#=L
Y [7:0] and C [7:0] terminals are made to be enable.
Note: C [7:0] terminal is the multiplexed terminal as OSDPLT [3:0] and so on.
For Video8 register = 0, VDEN# terminal is valid for Y [7:0] alone.
Composite blank output terminal. Horizontal/vertical blanking area and
polarity are programmable.
Input/output terminal of vertically synchronous signal. Polarity and synchronous
signal length are programmable.
Input/output terminal of horizontally synchronous signal.Polarity and
synchronous signal length are programmable.
Input/output terminal for identification of even/odd number field. Polarity is
programmable.
Video8 register = 0
Brightness signal output/input terminal.
Video8 register = 1
Brightness/color difference multiplex terminal as ITU-T656
Terminal to input video clock or output 27 MHz.
Input terminal to switch video master/slave.
VMASTER=L
Video master mode. Video synchronizing signal and video clock are
internally generated.
HTYPE=H
Video slave mode. Video synchronizing signal and video clock are re
ceived from the external.
Video output enable input terminal
VDEN#=H
Y [7:0] and C [7:0] terminals are made to be disable (3-state).
VDEN#=L
Y [7:0] and C [7:0] terminals are made to be enable.
Note: C [7:0] terminal is the multiplexed terminal as OSDPLT [3:0] and so on.
For Video8 register = 0, VDEN# terminal is valid for Y [7:0] alone.
Composite blank output terminal. Horizontal/vertical blanking area and
polarity are programmable.
Input/output terminal of vertically synchronous signal. Polarity and synchronous
signal length are programmable.
Input/output terminal of horizontally synchronous signal.Polarity and
synchronous signal length are programmable.
Input/output terminal for identification of even/odd number field. Polarity is
programmable.
Video8 register = 0
Brightness signal output/input terminal.
Video8 register = 1
Brightness/color difference multiplex terminal as ITU-T656
Terminal to input video clock or output 27 MHz.
84
VCLK
3-S
I/O
85
VMASTER
I
I
87
VDEN#
I
I
88
CBLANK
O
O
89
VSYNC
3-S
I/O
90
HSYNC
3-S
I/O
91
FI
3-S
I/O
92
94-97
Y[7:0]
3-S
O
99-101
124
VCLK X 2
3-S
I/O
Video interface terminal list
Video interface
Pin No.
Pin name
Type
Direction
Function
Audio (PCM) input terminal.
Stereo x1
Audio (PCM) output terminal.
Stereo x3
S/PDIF output terminal AC-3 stream or PCM stream can be output.
Moreover, it works as the audio output terminal of 7th and 8th channels
Left/Right clock output terminal of AOUT [2:0] and AIN.
The polarity is programmable.
Bit clock output terminal of AOUT [2:0] and AIN.
The polarity is programmable.
Audio master clock input/output terminal.
256 Fs or 386 Fs can be used.
Stereo x1
Audio (PCM) output terminal.
Stereo x3
S/PDIF output terminal AC-3 stream or PCM stream can be output.
Moreover, it works as the audio output terminal of 7th and 8th channels
Left/Right clock output terminal of AOUT [2:0] and AIN.
The polarity is programmable.
Bit clock output terminal of AOUT [2:0] and AIN.
The polarity is programmable.
Audio master clock input/output terminal.
256 Fs or 386 Fs can be used.
Audio interface terminal list
Pin No.
Pin name
Type
Direction
112
AIN
I
I
114-116
AOUT[2:0]
O
O
117
S/PDIF
O
O
(AOUT[3])
118
ALRCLK
O
O
119
ABCLK
O
O
132
AMCLK
3-S
I/O
Audio interface
11-15
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