SM-SX1 (serv.man2). (including circuit diagrams and s) - Sharp Audio Service Manual (repair manual). Page 41

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• Outline
The TDA1307 is an advanced oversampling digital filter employing bitstream conversion technology, which has been designed
for use in premium performance digital audio applications. Audio data is input to the TDA1307 through its multiple-format interface.
Any of the four formats (IIS, Sony 16, 18 or 20-bit) are acceptable. By using a highly accurate audio data processing structure,
including 8 times oversampling digital filtering and up to 4th order noise shaping, a high quality bitstream is produced which, when
used in the recommended combination with the TDA1547 bitstream DAC, provides the optimum in dynamic range and signal-to-
noise performance. With the TDA1307, a high degree of versatility is achieved by a multitude of functional features and their easy
accessibility; error concealment functions, audio peak data information and an advanced patented digital fade function are
accessible through a simple microprocessor command interface, which also provides access to various integrated system settings
and functions.

1

WS

Input

Word select input to data interface

2

SCK

Input

Clock input to data interface

3

SD

Input

Data input to interface

4

EFAB

Input (Note 1)

Error flag: (active HIGH) input from decoder chip indicating unreliable data

5

SBCL

Input

Subcode clock: a 10-bit burst clock (typ. 2.8224 MHz) input which synchronizes the subcode data

6

SBDA

Input

Subcode data: a 10-bit burst of data, including flags and sync bits, serially input once per
frame, clocked by burst clock input SBCL

7*

CDEC

Output

Decoder clock output: frequency division programmable by means of pins 14 (CLC1) and 17
(CLC2) to output 192, 256, 384 or 768 times fs

8

VDD3

—

Positive supply 3

9

VSS2

—

Ground 2

10*

DOBM

Output

Digital audio output: this output contains digital audio samples which have received
interpolation, attenuation and muting plus subcode data. Transmission is in biphase-mark
code.

11*

DSL

Output

Digital silence detected (active LOW) on left channel

12*

DSR

Output

Digital silence detected (active LOW) on right channel

13

DSTB

Input (Note 2)

DOBM stand-by mode enforce pin (active HIGH)

14

CLC1

Input

Application mode programming pin for CDEC (pin 7) frequency division

15*

CMIC

Output

Clock output, provided to be used as running clock by microprocessor (in master mode only),
output 96fs

16

VSS3

—

Ground 3

17

CLC2

Input

Application mode programming pin for CDEC (pin 7) frequency division

18

CDCC

Input

Master/Slave mode selection pin

19*

RESYNC

Output

Resynchronization: out-of-lock indication from data input section (active HIGH)

20

POR

Input (Note 2)

Power-on reset (active LOW)

21

VDD1

—

Supply voltage 1

22

XTAL1

Input

Crystal oscillator terminal: local crystal oscillator sense

23

XTAL2

Output

Crystal oscillator output: drive output to crystal or forced input in slave mode

24

VDDOSC

—

Positive supply connection to crystal oscillator circuitry

25

VSSOSC

—

Ground connection to crystal oscillator circuitry

26*

MODE

Input (Note 2)

Evaluation mode programming pin (active LOW); in normal operation, this pin should be left
open-circuit or connected to the positive supply

27

DOL

Output

Data output left channel to bitstream DAC TDA1547

28*

NDOL

Output

Complementary data output left channel to TDA1547

29

VDDAL

—

Positive supply connection to output data driving circuitry, left channel

30

VSSAL

—

Ground connection to output data driving circuitry, left channel

31

VSSAR

—

Ground connection to output data driving circuitry, right channel

32

VDDAR

—

Positive supply connection to output data driving circuitry, right channel

33

DOR

Output

Data output right channel to TDA1547

34*

NDOR

Output

Complementary data output right channel to TDA1547

35

CDAC

Output

Clock output to bitstream DAC TDA1547

36, 37

TEST1, TEST2

Input (Note 1)

Test mode input. In normal operation this pin should be connected to ground

38

DA

Input/Output

Bidirectional data line intended for control data from the microprocessor and peak data from

(Note 2)

the TDA1307

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.