TX-LR32C10 - Panasonic TV Service Manual (repair manual). Page 5

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TX-LR32C10
5
1.3.
KM02 Chasis Block Diagram
BT
 → Divide
A
LCD P
A
NEL
IPK
Point Dip
Inspection
<V
isual check>
*V
oltage check
* LED Check Inverter (Blue LED)
<F
ACT
-TEST>
*ANALOG TUNE 
*VCXO ADJ
*LOCAL
 OSD  
*A
V_SW  CHECK 
     *A
V1/A
V2/A
V3---CVBS
     *A
V3---S(YC)
     *MONIT
OR-OUT
     *A
V1/A
V2---Component
     *PC  
     *HDMI1
     *HDMI2
     
*CEC_(HDMI1/HDMI2)
*Backlight
*SD Card  
*Software & EEPROM version
check by self check (1 set only) 
IP-PCB: 32” IPS ONL
Y
(Inverter & Power)
TNP4G455
P-PCB: 37” ONL
Y
(Power)
TNP4G454
BT
 → Divide
In coming check
W
riting
Assembly
A-PCB
TNP4G460
(Degital main)
V
-PCB
(LED)
TNP
A4834
PEAKS NOR Flash
       (W
riting IC)
         256Mbit
         IC8554
Sum : only ef
fective area
Add : 0 ~ 1FFFFFF
EEPROM W
riting (On board)
*GENX
    • EEPROM (8k) x 1
      IC1
101
*PEAKS
• EEPROM (16k) x 1
IC8601
<W
rite Protect command>
*GENX : Protect OFF = 70,88,00
               Protect ON = 70,88,f
f
*PEAKS : Protect OFF = 70,8B,00
                Protect ON  = 70,8B,f
K-PCB
(Control)
TNP
A4901
BT
Inspection
FOR TNP4G455 
ONL
Y
*Adjust the frequency to 56 ± 1kHz by using VR7851
*Check to the output : J102 or 
TP7871
*Check to the Over V
oltage protection
*Check to the 
Arc protection
Inspection
LED CA
T
 EYES,REMOCON RECEIVER
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