Read Panasonic KX-AT7730RU Service Manual online
9
KX-AT7730 Series
4.2.3.
DATA COMMUNICATION CIRCUIT
1) Reception
The data from the PBX is received via the H and L lines along the path shown below.
The data from the PBX is received via the H and L lines along the path shown below.
H, L Line
→ D2 → T2 → R106 → Q102 → IC9 → IC1 Pin 19
2) Transmission
The data to the proprietary telephone is transmitted along the following path.
The data to the proprietary telephone is transmitted along the following path.
IC1 Pin 16
→ Q101 → T2 → D2 → H, L Line
DATA
INPUT
INPUT
DATA
OUTPUT
OUTPUT
(P3_3)
(P3_7)
Start Signal
(Max. 19 pulses)
(Max. 47 pulses)
Acknowledge Signal
Timing Chart
Circuit Diagram
IC1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DOUT
DOUT
DI_INT
DI_INT
P3_5
P3_4
P3_3/*INT3
P2_7
P2_6
P2_5
P2_4
P2_3
P2_2
P2_1
P2_0
P3_6
P3_1
P8_6
P8_5
P8_4
P8_3
P8_2
P8_1
P8_0
P6_7
P6_6/TXD2
P6_5/CLK2
P4_5
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
P0_
7/DA1
P0_
6/DA0
P0_5
T_CONT1
P0_3
P0_2
P0_1
P0_0
P6_4
P6_3
P6_2
P6_1
P6_0
P5_7
P5_6
P3_2
P3_0
P4_2/VREF
MODE
HS_MUTE
P4_4/XCOUT
*RESET
P4_7/XOUT
VSS/AVSS
P4_6/XIN
VCC/AVCC
P5_4
P5_3
P5_2
P5_1
P5_0
P3_7
D6
Q101
IC7
3
OUT
2
GND
1
VCC
D4
D5
D7
C103
C101
T2
1
2
4
5
6
7
10
9
8
R106
R108
R101
R102
R201
R103
R107
R105
R104
DG
D3.3V
D3.3V
DG
D3.3V
DG
DG
D3.3V
+6V
D5V
D3.3V
DG
A5V
DG
DG
AG
AG
DG
DG2
D3.3V
DG
+6V
D5V
V1
J4
J1
IC9
1
NC
2
A
4
Y
5
VCC
3
GND
R300
NC
D3.3V
R301
NC
R302
NC
R303
NC
IC11
1 CE
2 GND
3
VOUT
4
VDD
C205
C102
NC
Q102
DG
Q110
( )
NC
C104
C204
C210
D2
4
1
3
2
C203
D40
C215
C206
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