Read Panasonic PT-RZ21K / PT-RS20K (serv.man2) Service Manual online
DIA-6
BLOCK & SCHEMATIC DIAGRAMS
< RZ21K series >
1. 4. Signal Processing Block Diagram (A-PCB)
IC3020
[BGA]
IC3010
IC3501
[BGA]
CPU & IP/RESIZE
3ch-ADC
HV FREQUENCY DET.
PICTURE ADJ
・CONTRAST
3ch-ADC
VIDEO DECODER
2D COMB
RESIZE
PICTURE POSITION ADJ
(V-SHIFT)
PICTURE ADJ
・BRIGHTNESS
・CONTRAST
・COLOR
・TINT
・SHARPNESS
KEYSTONE
(VERTICAL)
3D NR
IP (SD/HD)
P IN P
HDCP Key
EEPROM
CPU
SYSTEM CONTROL
・LD ON/OFF Cont.
・LAN Cont.
Clock Gen.
X3501
LAN
DIGITAL LINK
RGB 2-IN
DVI D-IN
RGB1-IN
Y/C(Gch/Bch)
VIDEO(Rch)
IC3058
[BGA]
FPGA1
IC3901,IC3921,
IC3941,IC3961
DDR3 SDRAM
IC3716
[BGA]
[BGA]
[BGA]
[BGA]
128M FLASH
MAIN SOFT
IC3741
RTC
HDMI
SPI
TMDS
IC3721
SDRAM
HDMI RxD
HDCP Key
EEPROM
IC3062
VIDEO AMP
IC2001
[BGA]
HD BaseT
TRANSMITTER/
RECEIVER
IC2003
EEPROM
(HDBT SOFT)
TMDS
TMDS
LVDS 44
IC3067
(EDID)
EEPROM
Y
IC3061
EDID control
INPUT SELECT
TEST PATTERN
APL DET. (IRIS/AI)
PICTURE POSITION ADJ
(H-SHIFT)
CHROMA DET.
(DYNAMIC RGB BOOSTER)
SDI RECEIVER
(GTP TRANSCEIVER)
・SDI DECODE
SDI-IN1
・FAN I/O
・LENS I/O
・SHUTTER I/O
IC3072
SID
CABLE EQUALIZER
Q3035, Buffer
IC3075
SEL.SW
SEL.SW
R
G
B
C
CVBS
G(for C.C.)
CVBS or G(for C.C.)
Y
C
SDI
Q3033, Buffer
Q3034, Buffer
R
G
B
R
G
B
R
G
B
SOG
CC_SELA/CC_SELB
SOG
SOG
IC3064
SW
IC3065
SW
IC3063
SW
50SCL14
50SDA14
IC3068
SW
50SCL14
50SDA14
LEVEL SHIFT
Q3029,Q3030
EDID_33SCL
EDID_33SDA
AH_TMDS_SCL
AH_TMDS_SDA
HDMI1_SDA
HDMI1_SCL
IC3736
SEL.SW
SDI/SCL
HDBT_IR<TO IC3501>
HDBT_IR_SUB<TO A2>
HDBT_CFG_SCL
HDBT_CFB_SDA
CPUIICSEL1 CPUIICSEL2
CPUIICSEL3 CPUIICSEL4
CPUIICSEL1
CPUIICSEL2
CPUIICSEL3
CPUIICSEL4
33CPUSDA4
33CPUSCL4
33CPUSDA1
33CPUSCL1
HDBTMC_TXD
HDBTMC_RXD
CPU_BLST1
LAMP1_SCL
LAMP1_SDA
LAMP2_SCL
LAMP2_SCL
LAMP2_SDA
LAMP1_SCL
LAMP1_SDA
LAMP2_SCL
LAMP2_SDA
A2
LOWB_ON (CPU_BLST2)
For LD control
For Power control
RS232C-IN PORT
RS232C-OUT PORT
X2_232CIN_TXD
X2_232CIN_RXD
232COUT_TXD
232COUT_RXD
CPU_FPGA_SI
CPU_FPGA_RST
CPU_FPGA_RW
AC100/200V (AC_90V_DET)
CPU_CFG_DONE12
CPU_FPGA1_CS
IC3762
BUFFER
IC3772
BUFFER
CPU_FPGA_CLK2
CPU_FPGA_SO2
IC3761
BUFFER
IC3771
BUFFER
CPU_FPGA_SO1
CPU_FPGA_CLK1
CPU_CFG_DONE12
CPU_CFG_PROG1
PWR_DOWN
62
80
81
63
75
76
95
96
97
98
4
5
6
1
65
2
3
79
83
85
86
87
88
69
70
72
73
116
118
119
117
115
114
90
91
110
111
FP1_FP2_SCLK
FP1_FP2_NCS
FP1_FP2_SO
FP1_FP2_SI
CPU_FPGA_SI
CPU_FPGA_RST
CPU_FPGA_RW
EDID_33SCL
EDID_33SDA
EDID_33SCL
EDID_33SDA
H/V
R
G
B
R/Pr/Video
G/Y
B/Pb/C
H/V
HDBTMC_TXD
HDBTMC_RXD
B0～B9
R0～R9
G0～G9
ACT
HD
VD
PICLK
B0～B9
R0～R9
G0～G9
ACT
HD
VD
PICLK
33CPUSCL2_A1
33CPUSDA2_A1
33CPUSCL2_A1
33CPUSDA2_A1
33CPUSCL2_A2
33CPUSDA2_A2
33CPUSCL2_A2
33CPUSDA2_A2
IC3751
SCL_COLOR
SDA_COLOR
33CPUSDA4
33CPUSCL4
33CPUSCL2
33CPUSDA2
33CPUSCL2
33CPUSDA2
CPU_FPGA_SO0
CPU_FPGA_CLK
CPU_CFG_DONE12
CLK245(24.576MHz)
(35.455MHz)
CLK245(24.576MHz)
JK3005
JK3001
JK3008
JK3006
JK2001
SDI_EQ_CDN/3GEQ_SDO_P/3GEQ_SDO_N
SDI_EQ_SS
SDI_EQ_SDI
SDI_EQ_SCK/SDI_EQ_SDO
SDI_EQ_CDN2/3GEQ_SDO_P2/3GEQ_SDO_N2
SDI_EQ_SS2
SDI_EQ_SDI
SDI_EQ_SCK/SDI_EQ_SDO
CLK245(24.576MHz)
IC3711
EEPROM
MOTION
SENSOR
Q3036, BUFFER
Q3037, BUFFER
Q3038, BUFFER
SOG
8
8
8
T2001
TRANS
8
2
FP1_FP2_INT_SYNC
FP1_FP2_EXT_SYNC
CASE_OPEN (CPU_CFG_PROG2)
IR_TOP (CASE_OPEN)
A1
R8_TXD
R8_RXD
REQ_TO_R8
CPU_FPGA2_CS (CPU_FPGA2_CS)
IRIN_FRONT
IRIN_REAR
HDBT_IR_SUB
HDBT_IR<FROM IC2001>
IC3712
EEPROM
34
34
34
To PB-P.C.Board
(PB3)
To DG-P.C.Board
(DG2)
HV FREQUENCY DET.
PICTURE ADJ
+3.3V STB
+5V STB
+3.3V_A
+3.3V_B
+12V
A-P.C.Board
3
4
IC3731
SEL.SW
34
SDI-IN2
IC3071
SID
CABLE EQUALIZER
SDI
JK3009
3
4
HDBT232C_TXD HDBT232C_RXD
X3_IR
FRONT/REAR/HDBT/(TOP)
FPGA1-FPGA2 Serial I/F
COLOR SENSOR /
PRESSURE SENSOR
HDBT_TX/RX
3DSYNC CONTROL
Backup
(CPLD update use)
MAIN CPU-->FPGA2
Serial I/F
SUB CPU
MAIN CPU-->FPGA2
CONFIG
SDI_EQ_CDN/3GEQ_SDO_P/3GEQ_SDO_N
SDI_EQ_CDN2/3GEQ_SDO_P2/3GEQ_SDO_N2
SDI_EQ_SS
SDI_EQ_SS2
SDI_EQ_SDI
SDI_EQ_SCK/SDI_EQ_SDO
(EDID)
EEPROM
FP1_FP2_SCLK
HDBT232C_TXD
HDBT232C_RXD
FP1_FP2_NCS
FP1_FP2_SO
FP1_FP2_SI
FP1_FP2_EXT_SYNC
FP1_FP2_INT_SYNC
SCL_COLOR
SDA_COLOR
[BGA]
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