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9
DP-1520P/1820P/1820E
SEP 2004
Ver. 1.0
2.2.
SPC PC Board (Scanner and Printer Circuit)
1. System Configuration
The SPC PC Board controls all mechanical drivers for the Scanner and Printer.
The 16-bit CPU consist of Gate Array, F-ROM for Programming and SRAM for Work area.
The 16-bit CPU consist of Gate Array, F-ROM for Programming and SRAM for Work area.
2. SC PC Board Interface
The Serial and Parallel Communication Ports used to interface the following devices.
• Serial Interface
SPCRXD: Sends data to SC PCB
SPCTXD: Receives data from SC PCB
IICSDA: Sends and Receives data for Program Updating
IICSCL: Sends and Receives data clock for Program Updating
SPCTXD: Receives data from SC PCB
IICSDA: Sends and Receives data for Program Updating
IICSCL: Sends and Receives data clock for Program Updating
• Parallel Interface for Scanner
pSENTIM: Main Scan Synchronous Signal
pVREQ: Sub Scan Synchronous Signal
nSREQ: Scan Enable Signal
nSACK: Request Shading Signal
pVREQ: Sub Scan Synchronous Signal
nSREQ: Scan Enable Signal
nSACK: Request Shading Signal
• Parallel Interface for Printer
nPRDY: Print Ready
nVRDY: Request Print Ready
nPACK: Ready for Paper Feed
nATT : Printer Status Signal
nDUPACK: Ready for Duplex Paper Feed
nPVSYNC: Vertical Synchronous Signal
pPRNT: Print Data
pBD_A: Line Synchronous Data
pSPCRST: Reset Signal
nPRGDWN: Program Download Signal
nVRDY: Request Print Ready
nPACK: Ready for Paper Feed
nATT : Printer Status Signal
nDUPACK: Ready for Duplex Paper Feed
nPVSYNC: Vertical Synchronous Signal
pPRNT: Print Data
pBD_A: Line Synchronous Data
pSPCRST: Reset Signal
nPRGDWN: Program Download Signal
CPU
IC2
IC2
M30802
GATE ARRAY
IC6
DZAL000349
FLASH ROM
IC3
MX29F400BTC
(512kB)
SRAM
IC4
LC35256
(32kB)
SRAM
IC5
LC35256
(32kB)
A0~7
18,19
18,19
A0~19
D0~15
A1~18
A1~15
A1~15
D0~15
D0~15
D0~7
D8~15
nRD
nWRL
nWRH
nCS0
nCS1
nCS2
nWRL
nWRH
nCS0
nCS1
nCS2
nCS3
nRD
nWRL
nWRH
nWRL
nWRH
nCS
nOE
nWE
nWE
nCE
nOE
nWE
nWE
nCE
nOE
nWE
nWE
nCE
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