Read Panasonic KX-TDA620BX (serv.man8) Service Manual Supplement online
9
KX-TDA620 Series
4.2.3.
Circuit Description
ASIC Block (Sheet1)
This block is capable of controlling the EC bus, which is a way of accessing the option card.
It also realizes TSW function by controlling the CT bus (8.192MHz HW clock; 8 highways, 128 timeslots). At the same time, it is
capable of controlling conference call with a range of 3 parties of 10 to 8 parties of 4.
It also generates single or DTMF tones in any highway or time slot.
It also realizes TSW function by controlling the CT bus (8.192MHz HW clock; 8 highways, 128 timeslots). At the same time, it is
capable of controlling conference call with a range of 3 parties of 10 to 8 parties of 4.
It also generates single or DTMF tones in any highway or time slot.
CPU Block (Sheet2)
The CPU block consists of IC200 (CPU), X201 (Clock for timer), IC202 (spread clock).
IC200 is the CPU that controls the expansion shelf, X201 is the clock that the CPU uses internally, and IC202 is a driver to trans-
mit the CPU operating clock from the ASIC block.
IC200 is the CPU that controls the expansion shelf, X201 is the clock that the CPU uses internally, and IC202 is a driver to trans-
mit the CPU operating clock from the ASIC block.
Memory Block (Sheet3)
This block consists of IC301, 302 (SDRAM), IC303 (flash ROM), IC304 (SRAM), as well as the following to separate the main
and local buses: IC305, IC306, IC307, IC308, IC309, IC310, IC311, IC313 (Logic IC).
In flash memory are stored the boot and operating programs.
SDRAM is the region in which the operating program is actually expanded and run.
SRAM is the region in which an error log is temporarily stored during operation.
Access to ICs and all RAM aside from SDRAM is done through the separated local bus.
and local buses: IC305, IC306, IC307, IC308, IC309, IC310, IC311, IC313 (Logic IC).
In flash memory are stored the boot and operating programs.
SDRAM is the region in which the operating program is actually expanded and run.
SRAM is the region in which an error log is temporarily stored during operation.
Access to ICs and all RAM aside from SDRAM is done through the separated local bus.
CircLink Block (Sheet4)
This block consists of IC401 (Controller), X401 (source clock 40MHz), and IC410.
Through message communication among controllers within the BUS-M card mounted in the basic shelf, packet communication
with EMPR of the basic shelf is made possible.
LVDS is used for actual communication.
IC402 serves an auxiliary role when the CPU accesses other ICs.
Through message communication among controllers within the BUS-M card mounted in the basic shelf, packet communication
with EMPR of the basic shelf is made possible.
LVDS is used for actual communication.
IC402 serves an auxiliary role when the CPU accesses other ICs.
System TSW Block (Sheet5)
This block consists of IC501 (TSW).
It is capable of exchanging voice data between the CT bus (1024ch) within the unit and the voice bus (384ch) of the basic shelf.
It is capable of exchanging voice data between the CT bus (1024ch) within the unit and the voice bus (384ch) of the basic shelf.
Bus Cable Connection Block (Sheet6)
This block consists of IC601, 602, 603, 604, 605 (LVDS) and CN601 (BUS Cable Connector).
Each control signal is converted to a differential signal through LVDS device and sent to the bus cable.
Each control signal is converted to a differential signal through LVDS device and sent to the bus cable.
On board Power supply (Sheet7)
The power supply block consists of IC701 (DC/DC converter), Q712 (transistor), IC703 (regulator).
IC701 and Q712 are circuits to generate 3.3V used in nearly all of the ICs.
IC703 generates 1.5V used in the CPU (IC200).
IC701 and Q712 are circuits to generate 3.3V used in nearly all of the ICs.
IC703 generates 1.5V used in the CPU (IC200).
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