Read Panasonic KX-TDA6181X Service Manual online
Orange: OUS (Because OUS needs to be controlled by EMPR, reset terminal and port control terminal are ORed to generate
OUS)
OUS)
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• Instantaneous power interruption operation
When instantaneous power interruption is 300msec or less, reset operation is not carried out because the voltage is retained
by the capacitor in the power supply.
After HALT from EMPR is detected at the DC power down port, CPU goes into the sleep mode by executing the instruction of
SLEEP.
At the sleep mode, the CPU/Clock enter the halt state while the contents of the register, the internal RAM, and the I/O port is
maintained.
When the instantaneous power interruption is released, HALT is negated, and CPU is recovered to the normal mode by the
detection of IRQ0=L
by the capacitor in the power supply.
After HALT from EMPR is detected at the DC power down port, CPU goes into the sleep mode by executing the instruction of
SLEEP.
At the sleep mode, the CPU/Clock enter the halt state while the contents of the register, the internal RAM, and the I/O port is
maintained.
When the instantaneous power interruption is released, HALT is negated, and CPU is recovered to the normal mode by the
detection of IRQ0=L
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KX-TDA6181X
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