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2 BLOCK DIAGRAMS
2.1. CAMERA BLOCK DIAGRAM
CS
DTI
DTO
CLK
LVD
VD
CCD HD
CLK
CG CS
CG SO
ASP CS
IC291
(CAMERA u COM)
IC302
174
171
141
140
138
133
100
97
51
50
48
47
RW
DSTB
ASTB
VIV2
BEND
168
136
96
31
83
(DSP)
IC301
I/F
DSC
ZOOM
H.V
CNR
YCP
DRAM
FCK
LVD
VD
HD
22
19
18
17
/DATA
ADDRESS
MICON I/F
245
243
242
247
248
251
249
238
226
BUSY
DTD STB
BLK END
MEGAPIX
DSC/VIDEO
MAIN
TO
PP301
CONNECTOR
TO
140
139
138
137
DSC/VIDEO
MAIN
TO
PP301
CONNECTOR
TO
8bit
C OUT
8bit
Y OUT
97
94
91
88
108
106
101
98
CONVERTOR
DD
PROCESSOR
Y/C
14
5
(EEP ROM)
IC303
1
4
3
2
10
67
66
65
151
145
145
60
11
103
160
163
X201(27MHz)
2
4
3
CLK
S CG
S DATA
(CG/SSG/V.H DR)
IC202
V1
V2
V3
V4
SUB
R
H2
H1
DS2
DS1
GATE
REGISTER
1/2
SSG/TG
DRIVE
V
DRIVE
H
GATE
25
30
29
36
24
27
2
4
3
44
41
42
40
45
19
14
11
18
17
(CDS/AGC/AD)
IC203
30
16
48
47
46
21
22
12
3
A/D
CDS
AGC
I/F
DIGITAL
CAMERA
9
9
PS201
PP291
5
5
PS201
PP291
4
4
PS201
PP291
6
6
PS201
PP291
3
3
PS201
PP291
20
20
PS201
PP291
19
19
PS201
PP291
18
18
PS201
PP291
17
17
PS201
PP291
4
φ
V1
3
φ
V2
2
φ
V3
1
φ
V4
13
SUB
10
φ
R
12
φ
H2
11
φ
H1
8
VOUT
NV-MX8,MX2
CAMERA BLOCK DIAGRAM
CAMERA BLOCK DIAGRAM
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7
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