Read LG 47LH40 (CHASSIS:LA92G) Service Manual online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
56
R316
A_URSA_MCLKE
V9
10uF
C302
0.
1u
F
C316
URSA_BA1
11:R16;V10
B_URSA_BA0
T10
0.
1u
F
C944
URSA_A[0-12]
11
:T
13
URSA_DQS3
11:K23
URSA_DQS2
11:K24
URSA_DQS1
11:Y16
+1.8V_FRC_DDR
0.
1u
F
C311
B_URSA_MCLKE
T10
0.
1u
F
C327
0.
1u
F
C309
0.
1u
F
C952
22
AR306
0.
1u
F
C326
0.
1u
F
C336
A_URSA_CASZ
X16
56
AR317
0.
1u
F
C328
URSA_DQM1
11:W16
0.
1u
F
C337
0.
1u
F
C339
B_URSA_WEZ
Q13
+1.8V_MEMC
0.
1u
F
C340
56
R314
+1.8V_FRC_DDR
+1.8V_FRC_DDR
URSA_DQSB2
11:K24
URSA_DQM3
11:K24
B_URSA_RASZ
R16
A_URSA_BA1
V9
1000pF
C331
0.
1u
F
C307
B_URSA_BA1
T10
10uF
C323
1/16W
33
5%
R309
0.
1u
F
C325
22
AR311
URSA_MCLK1
11:AA15
A_URSA_RASZ
Y13
FRC_DQ[0-31]
11:AB16;E20
22
AR304
URSA_DQSB0
11:X16
0.
1u
F
C324
0.
1u
F
C320
0.
1u
F
C945
URSA_DQS0
11:X16
BLM18PG121SN1D
L300
+1.8V_FRC_DDR
22
AR307
150
OPT
R323
0.
1u
F
C333
1/16W
33
5%
R308
URSA_CASZ
11:P16;S16
+1.8V_MEMC
FRC_DQ[0-31]
11:AB16;AL20
0.
1u
F
C308
0.
1u
F
C946
URSA_ODT
11:K19;Q14
URSA_MCLKE
11:T16;T9
0.
1u
F
C943
56
R312
0.
1u
F
C942
0.
1u
F
C335
22
AR310
A_URSA_BA0
V9
B_URSA_BA0
O15
1/16W
33
5%
R307
+1.8V_FRC_DDR
+1.8V_FRC_DDR
1K1
%
R311
0.
1u
F
C334
22
AR305
URSA_MCLK
11:K20
A_URSA_BA1
AA15
URSA_CASZ
11:P16;W16
URSA_BA0
11:R16;T9
1K1
%
R321
0.
1u
F
C321
0.
1u
F
C341
22
AR313
B_URSA_RASZ
Q13
56
R303
1/16W
33
5%
R319
0.
1u
F
C330
B_URSA_CASZ
R16
56
R302
URSA_DQM2
11:K24
56
R313
150
OPT
R300
1000pF
C306
URSA_RASZ
11:P16;S16
56
AR302
0.
1u
F
C332
10uF
C312
0.
1u
F
C338
0.
1u
F
C948
0.
1u
F
C314
A_URSA_BA0
AA15
+1.8V_FRC_DDR
URSA_DQSB3
11:K23
URSA_MCLKE
11:T16;V10
URSA_ODT
11:K19;Y14
56
R317
B_URSA_BA1
O15
0.
1u
F
C303
1K1
%
R322
10uF
10
V
C301
1/16W
33
5%
R320
56
R306
56
AR301
56
AR315
56
R315
URSA_BA1
11:R16;T9
56
AR316
0.
1u
F
C300
URSA_WEZ
11:R16;V10
1/16W
33
5%
R318
URSA_WEZ
11:R16;T9
0.
1u
F
C304
A_URSA_WEZ
V9
0.
1u
F
C317
56
R305
10uF
10
V
C322
0.
1u
F
C310
B_URSA_CASZ
Q13
+1.8V_FRC_DDR
0.
1u
F
C949
URSA_MCLKZ
11:K20
A_URSA_RASZ
X16
0.
1u
F
C951
22
AR309
URSA_MCLKZ1
11:AB15
56
AR303
0.
1u
F
C947
22
AR312
B_URSA_MCLKE
Q14
+1.8V_FRC_DDR
22
AR308
0.
1u
F
C315
URSA_DQM0
11:W16
10uF
C329
URSA_RASZ
11:P16;W16
A_URSA_CASZ
Y13
1K
1 %
R310
56
AR314
0.
1u
F
C319
A_URSA_MCLKE
Z14
A_URSA_WEZ
Y13
URSA_BA0
11:R16;V10
B_URSA_WEZ
T10
0.
1u
F
C318
0.
1u
F
C950
0.
1u
F
C305
0.
1u
F
C313
56
R304
+1.8V_FRC_DDR
56
R301
56
AR300
URSA_DQSB1
11:Y16
HYB18TC512160CF-1.9
IC300
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
HYB18TC512160CF-1.9
IC301
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
DDRB_A[6]
DDR_DQ[12]
DDR_DQ[30]
DDR_DQ[26]
URSA_A[7]
FRC_DQ[26]
DDRB_A[10]
URSA_A[3]
DDRA_A[11]
DDRB_A[0]
DDRA_A[2]
URSA_A[12]
DDR_DQ[25]
DDR_DQ[4]
FRC_DQ[11]
DDRA_A[9]
DDRA_A[0]
URSA_A[0]
DDR_DQ[24]
URSA_A[10]
URSA_A[2]
DDRA_A[8]
DDR_DQ[25]
FRC_DQ[23]
DDRB_A[8]
DDRA_A[8]
DDR_DQ[13]
FRC_DQ[16]
DDR_DQ[18]
DDRB_A[9]
DDRA_A[9]
URSA_A[3]
DDRA_A[2]
FRC_DQ[3]
DDR_DQ[10]
FRC_DQ[12]
URSA_A[5]
URSA_A[2]
DDRB_A[2]
DDR_DQ[20]
DDRA_A[1]
FRC_DQ[15]
DDR_DQ[2]
URSA_A[1]
URSA_A[8]
URSA_A[9]
DDR_DQ[27]
DDR_DQ[21]
FRC_DQ[21]
DDR_DQ[23]
FRC_DQ[1]
DDRA_A[1]
DDRA_A[5]
DDR_DQ[26]
DDRB_A[4]
FRC_DQ[14]
FRC_DQ[13]
DDR_DQ[0-15]
DDRA_A[0-12]
DDR_DQ[28]
DDRA_A[3]
URSA_A[8]
DDR_DQ[22]
DDRA_A[5]
FRC_DQ[0]
DDRB_A[2]
DDRB_A[7]
DDR_DQ[8]
DDRA_A[3]
DDRB_A[9]
DDRB_A[11]
DDRB_A[8]
DDR_DQ[29]
FRC_DQ[9]
DDR_DQ[16]
DDR_DQ[6]
DDR_DQ[1]
DDRA_A[6]
DDR_DQ[6]
FRC_DQ[20]
FRC_DQ[29]
DDRB_A[3]
DDR_DQ[16]
URSA_A[0]
DDRB_A[7]
URSA_A[11]
FRC_DQ[17]
URSA_A[1]
URSA_A[6]
FRC_DQ[24]
DDR_DQ[3]
FRC_DQ[25]
DDRB_A[10]
DDR_DQ[31]
DDRB_A[12]
FRC_DQ[8]
DDR_DQ[30]
DDR_DQ[4]
DDR_DQ[31]
DDRA_A[4]
DDRB_A[12]
DDRA_A[4]
DDR_DQ[5]
FRC_DQ[27]
DDR_DQ[19]
DDRB_A[3]
DDRB_A[5]
FRC_DQ[2]
DDRB_A[0]
DDR_DQ[23]
DDRA_A[12]
DDRB_A[1]
DDR_DQ[29]
DDRA_A[12]
DDR_DQ[1]
FRC_DQ[22]
DDR_DQ[7]
DDR_DQ[20]
DDRB_A[6]
DDRA_A[11]
DDR_DQ[11]
DDR_DQ[0]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[10]
FRC_DQ[4]
DDR_DQ[15]
DDRA_A[10]
FRC_DQ[6]
URSA_A[10]
DDR_DQ[15]
DDR_DQ[14]
URSA_A[11]
DDR_DQ[12]
DDRA_A[6]
DDR_DQ[5]
DDRB_A[4]
DDR_DQ[9]
URSA_A[6]
FRC_DQ[7]
FRC_DQ[19]
DDRA_A[10]
URSA_A[4]
DDR_DQ[16-31]
DDR_DQ[17]
DDR_DQ[27]
DDR_DQ[22]
URSA_A[4]
DDR_DQ[13]
DDRB_A[11]
FRC_DQ[31]
DDR_DQ[7]
FRC_DQ[10]
URSA_A[5]
DDRA_A[7]
DDR_DQ[21]
DDR_DQ[14]
FRC_DQ[5]
DDR_DQ[3]
DDRB_A[5]
DDRA_A[7]
DDR_DQ[0]
DDR_DQ[24]
URSA_A[9]
FRC_DQ[18]
DDRA_A[0]
DDR_DQ[11]
DDR_DQ[28]
DDR_DQ[9]
FRC_DQ[30]
DDRB_A[1]
URSA_A[12]
DDR_DQ[8]
FRC_DQ[28]
DDR_DQ[2]
URSA_A[7]
DDRB_A[0-12]
DDR_DQ[17]
resonance Compensation
PI Result
DDR2 1.8V By CAP - Place these Caps near Memory
C
2009
URSA2 DDR2 IC
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