Read LG 42SL90-UA (CHASSIS:LA92S) Service Manual online
[E1]
[D1]
[L9]
[N5]
[N4]
[N12]
[N13]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SL90
09/06/24
LVDS/FRC
8 10
URSA_DQ[2]
URSA_B+[4]
URSA_DCK-
URSA_C+[4]
URSA_D+[2]
URSA_DQ[17]
URSA_C-[2]
URSA_A+[0]
URSA_DQ[24]
URSA_A+[3]
URSA_A-[4]
URSA_A+[0]
URSA_C-[4]
URSA_B+[0]
URSA_C-[3]
URSA_C+[0]
URSA_A-[1]
URSA_DQ[26]
URSA_A[5]
URSA_DQ[0]
URSA_DQ[0-31]
URSA_A-[2]
URSA_A[1]
URSA_D+[1]
URSA_B+[0]
URSA_D+[0]
URSA_A[10]
URSA_A+[2]
URSA_DQ[9]
URSA_C-[4]
URSA_D-[2]
URSA_A-[3]
URSA_C-[0]
URSA_C+[0]
URSA_C+[0]
URSA_B-[1]
URSA_DQ[5]
URSA_DQ[18]
URSA_B+[3]
URSA_DQ[8]
URSA_B-[0]
URSA_B-[1]
URSA_A-[3]
URSA_A+[3]
URSA_DQ[6]
URSA_B-[2]
URSA_A[12]
URSA_A[2]
URSA_CCK+
URSA_CCK+
URSA_DQ[21]
URSA_B-[4]
URSA_DQ[25]
URSA_B+[1]
URSA_C+[2]
URSA_DQ[27]
URSA_DCK+
URSA_DQ[1]
URSA_D+[4]
URSA_A+[1]
URSA_ACK+
URSA_DQ[13]
URSA_DQ[30]
URSA_A[11]
URSA_B+[2]
URSA_DQ[15]
URSA_A-[0]
URSA_BCK-
URSA_A[6]
URSA_B+[1]
URSA_DQ[31]
URSA_BCK+
URSA_DQ[10]
URSA_B-[2]
URSA_DQ[14]
URSA_B+[3]
URSA_DQ[23]
URSA_DQ[28]
URSA_C-[3]
URSA_B-[3]
URSA_D-[3]
URSA_C+[3]
URSA_C+[1]
URSA_D-[1]
URSA_A[9]
URSA_D+[4]
URSA_D-[3]
URSA_C-[1]
URSA_D+[3]
URSA_BCK-
URSA_A-[4]
URSA_C+[2]
URSA_B+[2]
URSA_DQ[12]
URSA_C-[1]
URSA_C-[0]
URSA_B-[3]
URSA_C+[1]
URSA_A+[4]
URSA_D-[0]
URSA_D+[1]
URSA_CCK-
URSA_D-[4]
URSA_A[0]
URSA_A+[1]
URSA_DQ[11]
URSA_A-[1]
URSA_D-[0]
URSA_A[8]
URSA_DQ[7]
URSA_DCK+
URSA_A[7]
URSA_B+[4]
URSA_C-[2]
URSA_D+[2]
URSA_D-[4]
URSA_ACK-
URSA_DQ[3]
URSA_DQ[29]
URSA_D-[2]
URSA_DQ[19]
URSA_D+[0]
URSA_BCK+
URSA_A-[0]
URSA_A+[4]
URSA_D+[3]
URSA_DQ[16]
URSA_DCK-
URSA_A+[2]
URSA_DQ[4]
URSA_C+[3]
URSA_DQ[22]
URSA_A-[2]
URSA_CCK-
URSA_A[3]
URSA_A[4]
URSA_D-[1]
URSA_B-[0]
URSA_ACK+
URSA_ACK-
URSA_DQ[20]
URSA_C+[4]
URSA_B-[4]
URSA_RASZ
MEMC_RXO0-
006:R36
+3.3V_MEMC
+3.3V_MEMC
R812
100
URSA_DQS3
009:Q13
R843
0
MEMC_RXE4+
006:R37
C
8
2
9
0
.
1
u
F
URSA_CASZ
MEMC_RXE2-
006:R38
M_SPI_CK
URSA_DQSB3
009:Q12
MEMC_RXO0+
006:R36
URSA_WEZ
MEMC_RXE3-
006:R37
C849
1000pF
URSA_MCLK
009:Q16
C828
0.1uF
C822
0.1uF
C820
0.1uF
OPC_EN
MEMC_RXO2-
006:R35
MEMC_RESET
006:AB20
R842
0
OPC(V4)
R809
1K
OPT
R853
2.2K
C
8
3
4
0.1uF
L806
BLM18PG121SN1D
R821
100
C
8
3
2
0.1uF
+3.3V_MEMC
L800
BLM18PG121SN1D
C805
1uF
URSA_BA1
R852
2.2K
M_SPI_DI
R845
0
OPT
+3.3V_ST
R854
0
OPT
R846
0
OPT
MEMC_RXO1-
006:R35
URSA_BA0
M_SPI_DO
C850
0.1uF
OPT
C815
10uF
10V
C816
10uF
R808
1K
R823
100
URSA_MCLKE
M_SPI_CZ
C811
22uF
16V
R827
1K
OPT
MEMC_SCL
006:AI5
C858
10uF
10V
10V
R837
100
C841
0.1uF
C807
10uF
10V
MEMC_RXO2+
006:R35
R851
1K
C
8
3
6
0
.
1
u
F
R850
1K
OPT
+5V_GENERAL
URSA_A[0-12]
L805
BLM18PG121SN1D
MEMC_RXO4+
006:R34
R835
0
MEMC_RXO3-
006:R34
C
8
3
1
0.1uF
R828
1K
PWM_DIM
M_XTALI
008:W26
C825
0.1uF
C823
1uF
MEMC_RXE0-
006:R38
C824
0.1uF
M_SPI_CZ
008:AG9
C
8
3
7
0
.
1
u
F
MEMC_RXO3+
006:R35
R811
10K
M_SPI_DO
008:AG9
BIT_SEL
MEMC_RXOC-
006:R33
C848
22uF
25V
OPT
ISP_TXD_TR
008:J22
C847
0.1uF
URSA_MCLKZ
009:Q15
URSA_DQSB0
C
8
1
4
0
.
1
u
F
R814
100
C845
0.1uF
URSA_MCLK1
C856
0.1uF
16V
MEMC_RXOC+
006:R34
MEMC_RXEC+
006:R36
C804
10uF
10V
URSA_ODT
009:Q15;009:Y15
URSA_DQS1
R848
1K
OPT
URSA_MCLKZ1
MEMC_RXE3+
006:R37
URSA_DQ[0-31]
009:D21;009:AL21
URSA_DQSB1
C
8
3
0
0
.
1
u
F
OPC_OUT1
+3.3V_MEMC
URSA_DQM3
009:Q13
L804
BLM18PG121SN1D
C819
0.1uF
C
8
1
7
0
.
1
u
F
C827
0
.
1
u
F
LVDS_SEL
R815
100
R819
100
+1.8V_MEMC
M_SPI_CK
008:AG9
M_SPI_DI
008:AG9
C
8
5
1
0
.
1
u
F
X800
12MHz
R806
56
R824
0
C821
0.1uF
R813
100
R826
1K
R804
1M
R803
10K
R822
100
C809
10uF
R818
100
R802
56
C
8
3
8
0
.
1
u
F
MEMC_RXE0+
006:R39
R801
56
C812
10uF
C
8
0
3
0
.
1
u
F
C846
0.1uF
URSA_DQM1
R820
100
C
8
5
2
0
.
1
u
F
R810
10K
C818
0.1uF
C
8
3
9
0
.
1
u
F
R838
100
R807
56
+3.3V_MEMC
R836
0
C826
0.1uF
C844
0.1uF
C801
15pF
C813
10uF
MEMC_RXEC-
006:R36
+3.3V_MEMC
ISP_RXD_TR
008:J23
R849
1K
URSA_DQM0
LVDS_SEL
ISP_RXD_TR
008:E10
R817
100
+1.26V_MEMC
MEMC_RXE4-
006:R37
URSA_DQS0
R816
100
MEMC_RXE1+
006:R38
+3.3V_MEMC
MEMC_RXO4-
006:R34
C800
15pF
R833
0
OPT
R847
0
OPC(V4)
C810
10uF
M_XTALO
008:W26
R805
0
0
OPT
C854
0.1uF
C
8
3
3
0.1uF
OPC_OUT2
M_XTALO
008:J28
+3.3V_MEMC
+3.3V_MEMC
L803
BLM18PG121SN1D
URSA_DQM2
009:Q13
C
8
4
2
0
.
1
u
F
R829
1K
OPT
L801
BLM18PG121SN1D
M_XTALI
008:M28
C
8
3
5
0.1uF
L807
CB3216PA501E
URSA_DQS2
009:Q13
MEMC_RXE2+
006:R38
IC800
W25X20AVSNIG
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
ISP_TXD_TR
008:E9
MEMC_SDA
006:AI5
C857
0.1uF
16V
C840
0.1uF
L802
BLM18PG121SN1D
URSA_DQSB2
009:Q12
C
8
0
2
0
.
1
u
F
C806
10uF
12V_TCON
C855
0.1uF
C853
0.1uF
C808
22uF
16V
R831
10K
MEMC_RXE1-
006:R38
C
8
4
3
0
.
1
u
F
R825
820
MEMC_RXO1+
006:R35
IC801
LGE7329A
E1
SDAS
D1
SCLS
F1
GPIO[8]
G1
GPIO[9]
K8
GND_14
E5
VDDC_1
E2
GPIO[10]
F2
GPIO[11]
F3
GPIO[12]
G2
GPIO[13]
M4
GPIO[22]
M5
GPIO[23]
G3
GPIO[14]
E4
GPIO[15]
F4
GPIO[16]
G4
GPIO[17]
H4
GPIO[18]
J4
GPIO[19]
K4
GPIO[20]
L4
GPIO[21]
J6
VDDP_2
H9
GND_7
F6
VDDC_2
H1
MDATA[20]
H2
MDATA[19]
H3
MDATA[17]
J1
MDATA[22]
J2
MDATA[27]
J3
MDATA[28]
K1
MDATA[25]
K2
MDATA[30]
K6
AVDD_DDR_2
K3
DQM[3]
L1
DQM[2]
J8
GND_10
L2
DQS[2]
L3
DQSB[2]
L6
AVDD_DDR_4
L8
VDDP_3
H10
GND_8
M1
DQS[3]
M2
DQSB[3]
L7
AVDD_DDR_5
M3
MDATA[31]
N1
MDATA[24]
J9
GND_11
N2
MDATA[26]
N3
MDATA[29]
L10
AVDD_DDR_6
P1
MDATA[23]
R1
MDATA[16]
T1
MDATA[18]
T2
MDATA[21]
R2
MCLK[0]
P2
MCLKZ[0]
G7
GND_1
L9
AVDD_MEMPLL
N5
MVREF
N4
ODT
T3
RASZ
R3
CASZ
P3
MADR[0]
T4
MADR[2]
R4
MADR[4]
J10
GND_12
P4
MADR[6]
T5
MADR[8]
R5
MADR[11]
P5
WEZ
T6
BADR[1]
R6
BADR[0]
P6
MADR[1]
T7
MADR[10]
L11
AVDD_DDR_7
R7
MADR[5]
P7
MADR[9]
T8
MADR[12]
R8
MADR[7]
P8
MADR[3]
N8
MCLKE
K10
GND_16
F7
VDDC_3
T9
MDATA[4]
R9
MDATA[3]
K7
GND_13
P9
MDATA[1]
T10
MDATA[6]
K11
AVDD_DDR_3
R10
MDATA[11]
P10
MDATA[12]
T11
MDATA[9]
R11
MDATA[14]
J11
AVDD_DDR_1
P11
DQM[1]
T12
DQM[0]
R12
DQS[0]
P12
DQSB[0]
H11
VDDP_1
T13
DQS[1]
R13
DQSB[1]
P13
MDATA[15]
T14
MDATA[8]
R14
MDATA[10]
P14
MDATA[13]
T15
MDATA[7]
R15
MDATA[0]
P15
MDATA[2]
T16
MDATA[5]
R16
MCLK[1]
P16
MCLKZ[1]
N9
GPIO[26]
N10
GPIO[27]
N11
GND_17
M11
RESET
G6
VDDC_4
N12
GPIO[28]
N13
GPIO[29]
N14
GPIO[30]
L13
SCK
M13
SDI
M12
SDO
K13
CSZ
L12
PWM1
K12
PWM0
J13
GPIO[0]
H13
GPIO[1]
G13
GPIO[2]
F13
GPIO[3]
E13
GPIO[4]
F12
GPIO[5]
D14
GPIO[6]
E12
GPIO[7]
N6
GPIO[24]
H6
VDDC_5
N15
LVD4M
N16
LVD4P
M14
LVD3M
M15
LVD3P
F8
AVDD_33_1
M16
LVDCKM
L16
LVDCKP
L15
LVD2M
L14
LVD2P
G9
GND_3
K14
LVD1M
J14
LVD1P
J16
LVD0M
J15
LVD0P
H15
LVC4M
H16
LVC4P
H14
LVC3M
G14
LVC3P
G16
LVCCKM
G15
LVCCKP
F15
LVC2M
F16
LVC2P
F14
LVC1M
E14
LVC1P
E16
LVC0M
E15
LVC0P
G10
GND_4
F9
AVDD_33_2
D16
LVB4M
D15
LVB4P
C16
LVB3M
B16
LVB3P
A16
LVBCKM
A15
LVBCKP
B15
LVB2M
C15
LVB2P
D2
GPIO_3
E3
GPIO_10
E10
GPIO_11
D10
GPIO_7
D8
GPIO_5
D12
REXT
C14
LVB1M
C13
LVB1P
A13
LVB0M
B13
LVB0P
D7
GPIO_4
D9
GPIO_6
B12
LVA4M
A12
LVA4P
C12
LVA3M
C11
LVA3P
A11
LVACKM
B11
LVACKP
B10
LVA2M
A10
LVA2P
C10
LVA1M
C9
LVA1P
A9
LVA0M
B9
LVA0P
F10
AVDD_PLL
G8
GND_2
D11
GPIO_8
D13
GPIO_9
E11
GPIO_12
N7
GPIO[25]
D6
SCLM
D5
SDAM
A14
GPIO_1
B14
GPIO_2
D3
XIN
D4
XOUT
K16
GPIO_14
K15
GPIO_13
H7
GND_5
G11
AVDD_LVDS_2
B8
RO0N
A8
RO0P
C8
RO1N
C7
RO1P
A7
RO2N
B7
RO2P
B6
ROCKN
A6
ROCKP
C6
RO3N
C5
RO3P
A5
RO4N
B5
RO4P
H8
GND_6
F11
AVDD_LVDS_1
B4
RE0N
A4
RE0P
C4
RE1N
C3
RE1P
A3
RE2N
B3
RE2P
B2
RECKN
A2
RECKP
C2
RE3N
C1
RE3P
A1
RE4N
B1
RE4P
GND_9
J7
GND_15 K9
P800
TF05-51S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
P801
TF05-41S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
R855
0
R856
0
OPT
+3.3V_MEMC
R857
4.7K
OPT
P803
WAFER-STRAIGHT
1
SPK_R-
2
SPK_R+
3
SPK_L-
4
SPK_L+
5
M
D
S
6
2
1
1
0
2
0
1
G
A
S
3
M
D
S
6
2
1
1
0
2
0
1
G
A
S
1
M
D
S
6
2
1
1
0
2
0
1
G
A
S
4
M
D
S
6
2
1
1
0
2
0
1
G
A
S
5
M
D
S
6
2
1
1
0
2
0
1
G
A
S
6
M
D
S
6
2
1
1
0
2
0
1
G
A
S
2
M
D
S
6
2
1
1
0
2
0
1
G
A
S
7
M
D
S
6
2
1
1
0
2
0
1
G
A
S
1
1
M
D
S
6
2
1
1
0
2
0
1
G
A
S
1
0
M
D
S
6
2
1
1
0
2
0
1
G
A
S
8
M
D
S
6
2
1
1
0
2
0
1
G
A
S
9
GPIO12 GPIO14
Non M+S LVDS LOW LOW
M+S 42" Mini LVDS LOW HIGH
M+S 47" Mini LVDS HIGH LOW
M+S 37" Mini LVDS HIGH HIGH
Non M+S LVDS LOW LOW
M+S 42" Mini LVDS LOW HIGH
M+S 47" Mini LVDS HIGH LOW
M+S 37" Mini LVDS HIGH HIGH
SPI FLASH
PI Result
PWM1
EEPROM
PWM0
HIGH
SPI
PI Result
HIGH
I2C
HIGH
ISP Port for MEMC
HIGH
LOW
HIGH
LOW
HIGH
HIGH
XTAL
GPIO8
SMD Gasket Option for FRC one-board
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