Read LG 42LH70YR (CHASSIS:LP91D) Service Manual online
22
AR1208
MEMC_DQ[16-31]
0.1uF
C1240
1000pF
C1239
56
R1209
MEMC_WEZ
DDRA_A[0-12]
0.1uF
C1216
MEMC_MCLK1
0.1uF
C1252
0.1uF
C1206
A_URSA_BA0
56
AR1214
MEMC_RASZ
56
AR1202
MEMC_BA1
MEMC_BA0
MEMC_DQM3
DDRA_A[0-12]
0.1uF
C1209
0.1uF
C1223
MEMC_DQM0
0.1uF
C1210
10uF
C1227
22
R1203
22
AR1207
0.1uF
C1241
MEMC_MCLKE
MEMC_DQSB2
56
AR1215
A_URSA_WEZ
A_URSA_CASZ
22
AR1205
MEMC_ODT
B_URSA_RASZ
A_URSA_CASZ
+1.8V_MEMC_DDR
0.1uF
C1220
0.1uF
C1229
17.4K
1%
R1232
1K
1%
R1222
MEMC_MCLK
56
R1217
MEMC_A[0-12]
MEMC_DQS0
+1.8V_MEMC_DDR
A_URSA_BA1
0.1uF
C1231
0.1uF
C1226
0.1uF
C1237
MEMC_DQM2
0.1uF
16V
C1221
1K
1%
R1221
B_URSA_RASZ
22
AR1212
22
R1204
BLM18PG121SN1D L1201
56
R1216
0.1uF
C1219
22
R1212
MEMC_CASZ
+1.8V_MEMC_DDR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
56
R1214
0.1uF
C1238
B_URSA_WEZ
150 READY
R1201
A_URSA_RASZ
0.1uF
C1217
150
READY
R1220
22
AR1210
22
R1213
B_URSA_BA1
1000pF
C1242
1K
1%
R1223
MEMC_DQS1
56
AR1204
A_URSA_MCLKE
A_URSA_MCLKE
B_URSA_CASZ
22
R1202
0.1uF
C1230
A_URSA_WEZ
1K
1%
R1224
10uF
C1203
56
R1205
22
AR1217
56
R1215
+1.8V_MEMC
MEMC_DQS2
0.1uF
C1233
+1.8V_MEMC_DDR
0.1uF
C1201
22
R1211
56
AR1203
0.1uF
C1228
56
R1210
MEMC_MCLKE
A_URSA_RASZ
56
R1206
B_URSA_BA1
MEMC_DQSB0
0.1uF
C1207
22
AR1209
MEMC_DQSB3
56
R1208
56
R1218
56
R1207
B_URSA_MCLKE
0.1uF
C1250
MEMC_MCLKZ
10uF
C1212
A_URSA_BA1
0.1uF
C1208
10uF
10V
C1202
22
AR1211
0.1uF
C1236
DDRB_A[0-12]
MEMC_RASZ
+1.8V_MEMC_DDR
0.1uF
C1234
MEMC_ODT
56
AR1213
56
AR1216
+1.8V_MEMC
MEMC_DQ[0-15]
10uF
10
V
C1249
MEMC_DQS3
MEMC_MCLKZ1
MEMC_DQM1
0.1uF
C1235
0.1uF
C1205
0.1uF
C1204
+1.8V_MEMC_DDR
56
R1219
22
AR1206
B_URSA_MCLKE
B_URSA_WEZ
0.1uF
C1224
HYB18TC256160BF-2.5
IC1202
J2
VREF
J8
CK
H
2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H
8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D
8
VSSQ_6
D
2
VSSQ_7
A
7
VSSQ_8
B
8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N
1
VSS_2
J3
VSS_3
E3
VSS_4
A
3
VSS_5
G
9
VDDQ_1
G
7
VDDQ_2
G
3
VDDQ_3
G
1
VDDQ_4
E9
VDDQ_5
C
9
VDDQ_6
C
7
VDDQ_7
C
3
VDDQ_8
C
1
VDDQ_9
A
9
VDDQ_10
R
1
VDD_1
M
9
VDD_2
J9
VDD_3
E1
VDD_4
A
1
VDD_5
B
9
DQ15
B
1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C
2
DQ9
C
8
DQ8
F9
DQ7
F1
DQ6
H
9
DQ5
H
1
DQ4
H
3
DQ3
H
7
DQ2
G
2
DQ1
G
8
DQ0
DDR_DQ[0-15]
0.1uF
C1214
DDR_DQ[0-15]
56
AR1201
DDR_DQ[16-31]
+1.8V_MEMC_DDR
MEMC_CASZ
MEMC_DQSB1
0.1uF
C1225
MEMC_BA1
DDRB_A[0-12]
+1.8V_MEMC_DDR
0.1uF
C1215
MEMC_BA0
A_URSA_BA0
B_URSA_BA0
0.1uF
C1213
B_URSA_BA0
10uF
C1222
B_URSA_CASZ
22
AR1218
DDR_DQ[16-31]
HYB18TC256160BF-2.5
IC1201
J2
VREF
J8
CK
H2
VSSQ_2
B
7
UDQS
N8
A4
P8
A
8
L1
NC_4
L2
BA0
R
8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A
9
M3
A
1
N3
A5
K8
CK
R
3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B
3
UDM
M
2
A10/AP
K
2
CKE
R
7
NC_6
M7
A
2
N7
A6
M8
A
0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K
9
ODT
A
2
NC_1
N2
A3
P2
A
7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R
2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
0.1uF
C1211
MEMC_WEZ
BLM18PG121SN1D L1202
0.1uF
C1218
0.1uF
C1232
1K
R1230
100uF
16V
C1251
10uF
16
V
C1260
18nF
16
V
C1259
10K
1%
R1231
1uF
C1264
0.1uF
C1262
0.1uF
C1261
0.1uF
C1248
BD9130EFJ-E2
IC1203
3
ITH
2
VCC
4
GND
1
ADJ
5
PGND
6
SW
7
PVCC
8
EN
10K
R1227
39K
1%
R1228
30K
1%
R1229
+3.3V_MEMC
22uF
C1244
0
R1233
+1.8V_MEMC
+5V_MEMC
+1.8V_MEMC
+1.26V_MEMC
100uF
C1243
0.1uF
C1267
10
R1234
47
R1226
10uF
16
V
C1258
MP2212DN
IC1205
3I
N
2
GND
4B
S
1F
B
5
VCC
6
SW_1
7
SW_2
8
EN/SYNC
10nF
C1256
10uF
16
V
C1257
10uF
25
V
C1254
0.1uF
C1246
10uF
25
V
C1253
1uF
25
V
C1255
10K
R1235
+3.3V_MEMC
+5V_MEMC
P_12V
39K
R1236
12K
R1237
330pF
C1245
18K
R1225
22uF
C1247
3.6uH
L1204
500
L1206
500
L1205
APE8953MP
IC1204
3
VOUT_1
2
FB
FB
4
VOUT_2
1
GND
5
VIN
6
VCNTL
7
POK
8E
N
2.2uH
L1203
DDR_DQ[24]
DDR_DQ[7]
DDRB_A[8]
MEMC_DQ[10]
DDR_DQ[10]
MEMC_A[0]
DDR_DQ[17]
DDRA_A[10]
DDR_DQ[12]
MEMC_DQ[0]
DDRA_A[1]
MEMC_DQ[23]
DDR_DQ[29]
DDR_DQ[27]
MEMC_DQ[17]
DDRA_A[11]
DDRB_A[9]
DDR_DQ[23]
DDRB_A[3]
MEMC_DQ[28]
MEMC_DQ[6]
DDR_DQ[23]
DDR_DQ[3]
MEMC_A[8]
DDR_DQ[28]
DDR_DQ[9]
DDRB_A[1]
DDR_DQ[15]
DDR_DQ[3]
MEMC_A[8]
DDRA_A[9]
DDRA_A[5]
DDRB_A[8]
DDR_DQ[13]
MEMC_A[9]
DDRA_A[9]
DDR_DQ[29]
MEMC_A[3]
MEMC_A[7]
DDRA_A[4]
DDRA_A[2]
DDRB_A[5]
DDRB_A[11]
DDRB_A[10]
MEMC_DQ[31]
DDR_DQ[5]
MEMC_A[12]
DDR_DQ[21]
MEMC_DQ[21]
MEMC_DQ[2]
DDR_DQ[19]
DDRA_A[12]
MEMC_DQ[22]
DDRB_A[6]
MEMC_A[1]
DDRB_A[0]
DDR_DQ[11]
DDR_DQ[26]
DDR_DQ[8]
DDRB_A[4]
MEMC_A[12]
MEMC_A[7]
MEMC_A[11]
MEMC_DQ[18]
DDRA_A[6]
DDRB_A[9]
DDR_DQ[2]
MEMC_A[2]
MEMC_A[10]
MEMC_DQ[30]
MEMC_DQ[16]
DDRA_A[5]
MEMC_DQ[20]
MEMC_DQ[8]
DDRA_A[4]
DDR_DQ[8]
MEMC_A[3]
DDR_DQ[26]
MEMC_DQ[29]
DDRA_A[1]
DDR_DQ[9]
DDRB_A[4]
DDR_DQ[4]
MEMC_DQ[26]
DDR_DQ[6]
DDRB_A[3]
DDRB_A[12]
DDRB_A[10]
DDR_DQ[19]
MEMC_DQ[3]
MEMC_DQ[25]
DDR_DQ[4]
DDRA_A[7]
MEMC_A[6]
DDRA_A[0]
DDR_DQ[13]
DDRB_A[0]
DDR_DQ[27]
DDR_DQ[22]
DDR_DQ[10]
DDR_DQ[7]
DDR_DQ[12]
MEMC_A[4]
DDRA_A[8]
DDR_DQ[11]
MEMC_A[0]
MEMC_DQ[12]
DDRB_A[2]
DDR_DQ[1]
MEMC_DQ[14]
DDR_DQ[0]
MEMC_DQ[4]
DDRB_A[1]
MEMC_DQ[24]
DDRA_A[12]
DDRB_A[2]
MEMC_A[10]
MEMC_DQ[7]
DDRA_A[3]
DDRB_A[11]
DDR_DQ[5]
DDRB_A[6]
DDR_DQ[30]
MEMC_DQ[1]
DDRA_A[11]
DDR_DQ[25]
DDR_DQ[2]
DDR_DQ[14]
DDRA_A[2]
DDR_DQ[25]
DDR_DQ[6]
DDR_DQ[18]
DDRA_A[7]
DDRB_A[7]
MEMC_A[5]
DDRB_A[12]
DDRB_A[7]
DDR_DQ[16]
DDR_DQ[15]
MEMC_A[1]
MEMC_DQ[9]
MEMC_A[9]
DDR_DQ[14]
DDRA_A[6]
DDRA_A[3]
MEMC_DQ[19]
DDR_DQ[20]
DDR_DQ[18]
DDRA_A[10]
DDR_DQ[31]
DDR_DQ[17]
DDR_DQ[1]
DDR_DQ[28]
DDR_DQ[20]
DDRA_A[8]
DDRB_A[5]
DDR_DQ[31]
DDR_DQ[0]
MEMC_A[4]
MEMC_A[2]
MEMC_DQ[15]
DDR_DQ[16]
DDR_DQ[22]
MEMC_DQ[27]
MEMC_DQ[11]
DDR_DQ[21]
DDRA_A[0]
MEMC_A[6]
DDR_DQ[30]
MEMC_DQ[5]
MEMC_DQ[13]
DDR_DQ[24]
MEMC_A[5]
MEMC_A[11]
2A
+1.8V_MEMC for DDR
DDR2 1.8V By CAP - Place these Caps near Memory
DDR2 1.8V By CAP - Place these Caps near Memory
1300 mA @85% efficiency
EAX58298501 Mstar LCD LH70
600 mA
400mA + 600mA
1000 mA @85% efficiency
+1.26V Core for MEMC
233 mA+400mA+600mA
Close to IC1204
2008/09/20
H6 LH70
9 9
MEMC_DDR & POWER
MAX 2A
R2
V0 = 0.8(1+R1/R2)
R1
+3.3V_MEMC
MAX 3A
Vo=0.8(1+R1/R2)
R1
R2
R2
V0 = 0.8(1+R1/R2)
R1
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