Read LG 42LH260H (CHASSIS:LA96B) Service Manual online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PM_TS[0]
PM_TS[7]
PM_TS[1]
PM_TS[3]
PM_TS[2]
PM_TS[5]
PM_TS[4]
PM_TS[6]
TS_3
TS_5
TS_4
TS_7
TS_6
TS_2
TS_0
TS_1
TS_1
FPGA_RESET
010:B19
R240910K
R2418
0
OPT
DE_H_SYSCLK
010:Q17
3.3V_Proidiom
C2177
100uF
16V
16V
PM_TS_CLK
008:AP25
TS_VALID
005:AN19
C2191
0.01uF
3.3V_Proidiom
GND
C2188
0.01uF
+VCCINT_1.5V
X1006
27MHz
27MHz
6
1
2
5
3
4
3.3V_Proidiom
3.3V_Proidiom
+VCCINT_1.5V
010:T25;010:AJ26
DE_H_SYSCLK
010:C12
R2387
22
+VCCINT_1.5V
GND
PM_TS_SYNC
008:AP25
C2176
10uF
16V
16V
C2189
3.3uF
16V
3.3V_Proidiom
TS_CLK
005:AN19
3.3V_Proidiom
R2408
10K
3.3V_Proidiom
TS_SYNC
005:AN19
C2186
3.3uF
16V
PM_TS_VALID
008:AP25
D1250
1N4148W
OPT
3.3V_Proidiom
VSB_RESET
008:AP22;005:AM26
FPGA_RESET
010:Q17
PM_TS[0-7]
008:AP27
SYS_RESET
008:AB21
3.3V_Proidiom
C2219
62pF
50V
62pF
50V
OPT
BSS83
Q1114
S
B
D
G
BSS83
Q1115
S
B
D
G
MSCL_3.3V
MSDA_3.3V
3.3V_Proidiom
3.3V_Proidiom
R2391
10K
R2392
10K
C2180
0.1uF
16V
0.1uF
16V
OPT
C2181
0.1uF
16V
0.1uF
16V
OPT
MSCL_3.3V
MSDA_3.3V
IC1209
LGDT1129
H1
CLK1
B8
IO2_29/TP_SOP
B9
IO2_21/TP_VALID
B10
IO2_17/TP_ERR
C5
IO2_41/TP_DATA[7]
C6
IO2_36/TP_DATA[6]
C7
IO2_31/TP_DATA[5]
C8
IO2_25/TP_DATA[4]
C9
IO2_23/TP_DATA[3]
C10
IO2_18/TP_DATA[2]
C11
IO2_14/TP_DATA[1]
C12
IO2_8/TP_DATA[0]
M1
IO1_29
C3
IO1_2
C2
IO1_3
B1
IO1_4
G5
IO1_5
F4
IO1_6
D3
IO1_7
E4
IO1_8
F5
IO1_9
E3
IO1_10
D2
IO1_11
E2
IO1_12
G1
CLK0
B2
IO2_48/RESET
D14
IO3_37/I2C_SCK
E14
IO3_34/I2C_SDA
K4
DCLK
K13
CONF_DONE
H3
NCONFIG
J4
NCE
H2
DATA0
G4
IO1_21SO
K3
IO1_22/ASDO
H4
NCEO
J13
NSTATUS
J3
MSEL0
J2
MSEL1
J14
TCK
H15
TDO
J15
TMS
H14
TDI
D4
IO1_1/INIT_DONE
D1
IO1_13
F3
IO1_14
G3
IO1_15
F2
IO1_16
E1
IO1_17
G2
IO1_18
F1
IO1_19
H5
IO1_20
J1
IO1_23
K2
IO1_24
L3
IO1_25
K1
IO1_26
L1
IO1_27
L2
IO1_28
N1
IO1_30
M2
IO1_31
N2
IO1_32
M3
IO1_33
L5
IO1_34
M4
IO1_35
N3
IO1_36
K5
IO1_37
L4
IO1_38
R1
IO1_39
P2
IO1_40
P3
IO1_41
N4
IO1_42
R2
IO4_1
T2
IO4_2
R3
IO4_3
P4
IO4_4
R4
IO4_5
T4
IO4_6
R5
IO4_7
M5
IO4_9
M6
IO4_10
N5
IO4_11
N6
IO4_12
R6
IO4_14
M7
IO4_15
T6
IO4_16
R7
IO4_17
N7
IO4_19
T8
IO4_21
M8
IO4_22
N8
IO4_23
M10
IO4_25
T9
IO4_27
N9
IO4_29
T11
IO4_31
N10
IO4_32
N11
IO4_36
N12
IO4_37
M9
IO4_38
M11
IO4_39
M12
IO4_40
R12
IO4_42
T13
IO4_43
R13
IO4_44
R14
IO4_45
P13
IO4_46
T15
IO4_47
R15
IO4_48
N13
IO3_1
P14
IO3_2
P15
IO3_3
R16
IO3_4
N15
IO3_5
N16
IO3_6
K12
IO3_7
K14
IO3_8
L12
IO3_9
N14
IO3_10
M13
IO3_11
M14
IO3_12
L13
IO3_13
M15
IO3_14
M16
IO3_15
L14
IO3_16
L15
IO3_17
L16
IO3_18
K16
IO3_19
K15
IO3_20
J16
IO3_21
H16
CLK3
G16
CLK2
H12
IO3_22
G14
IO3_23
G13
IO3_24
G15
IO3_25
F16
IO3_26
F14
IO3_27
F13
IO3_28
F15
IO3_29
E16
IO3_30
E15
IO3_31
D16
IO3_32
D15
IO3_33
F12
IO3_35
E13
IO3_36
H13
IO3_38
G12
IO3_39
B16
IO3_40
C15
IO3_41
C14
IO3_42
D13
IO3_43
B15
IO2_1
A15
IO2_2
B14
IO2_3
C13
IO2_4
B13
IO2_5
A13
IO2_6
B12
IO2_7
A2
IO2_47
E12
IO2_9
E11
IO2_10
E9
IO2_11
D12
IO2_12
D11
IO2_13
B3
IO2_46
B11
IO2_15
A11
IO2_16
D10
IO2_19
A9
IO2_20
D9
IO2_22
C4
IO2_45
E10
IO2_24
B4
IO2_44
D8
IO2_26
E8
IO2_27
A8
IO2_28
D7
IO2_30
A4
IO2_43
B7
IO2_32
A6
IO2_33
E7
IO2_34
P12
IO4_41/CH_DATA[7]
P11
IO4_35/CH_DATA[6]
P10
IO4_33/CH_DATA[5]
P9
IO4_28/CH-DATA[4]
P8
IO4_24/CH_DATA[3]
P7
IO4_18/CH_DATA[2]
P6
IO4_13/CH_DATA[1]
P5
IO4_8/CH_DATA[0]
R10
IO4_30/CH_ERR
R9
IO4_26/CH_SOP
R8
IO4_20/CH_VALID
R11
IO4_34/CH_CLK
A7
VCCINT_1
A10
VCCINT_2
G8
VCCINT_3
G10
VCCINT_4
H7
VCCINT_5
H9
VCCINT_6
J8
VCCINT_7
J10
VCCINT_8
K7
VCCINT_9
K9
VCCINT_10
T7
VCCINT_11
T10
VCCINT_12
C1
VCCIO1_1
G6
VCCIO1_2
P1
VCCIO1_3
T3
VCCIO4_1
L7
VCCIO4_2
L10
VCCIO4_3
T14
VCCIO4_4
P16
VCCIO3_1
K11
VCCIO3_2
C16
VCCIO3_3
A14
VCCIO2_1
F10
VCCIO2_2
F7
VCCIO2_3
A3
VCCIO2_4
A1
GND_1
A16
GND_2
A5
GND_3
A12
GND_4
F6
GND_5
F8
GND_6
F9
GND_7
F11
GND_8
G7
GND_9
G9
GND_10
G11
GND_11
H8
GND_12
H10
GND_13
J7
GND_14
J9
GND_15
K6
GND_16
K8
GND_17
K10
GND_18
L6
GND_19
L8
GND_20
L9
GND_21
L11
GND_22
T1
GND_23
T5
GND_24
T12
GND_25
T16
GND_26
J6
GNDA_PLL1
J5
GNDG_PLL1
J11
GNDA_PLL2
J12
GNDG_PLL2
H6
VCCA_PLL1
H11
VCCA_PLL2
B6
IO2_35
B5
IO2_42
D6
IO2_37
D5
IO2_38
E6
IO2_39
E5
IO2_40
R2406
10K
OPT
R2412
10K
R2413
10K
R2414
10K
R2390
10K
OPT
+3.3V
FE_DEMOD_SCL
008:AI5;005:AN21
FE_DEMOD_SDA
008:AI5;005:AN21
SCL_SUB/AMP
008:AI4;003:E6
SDA_SUB/AMP
008:AI4;003:E6
R2385
0
OPT
R2386
0
OPT
R2444
100
R2443
100
R2442
100
R2393
100
100
OPT
R2394
100
100
R2401
0
R2399
0
R2419
0
0
R2421
0
0
R2424
0
R2420
0
R2426
0
0
R2423
0
R2435
0
R2431
0
R2425
0
R2436
0
R2416
22
R2417
22
R2405
OPT
R2397
1K
R2403
1K
R2404
1K
R2402
1K
C2208
0.1uF
16V
C2198
0.1uF
16V
C2214
0.1uF
16V
C2178
0.1uF
16V
0.1uF
16V
C2218
0.1uF
16V
C2200
0.1uF
16V
C2212
0.1uF
16V
C2205
0.1uF
16V
C2196
0.1uF
16V
C2216
0.1uF
16V
C2217
0.1uF
16V
C2197
0.1uF
16V
C2204
0.1uF
16V
C2194
0.1uF
16V
C2215
0.1uF
16V
C2209
0.1uF
16V
C2199
0.1uF
16V
C2201
0.1uF
16V
C2203
0.1uF
16V
C2213
0.1uF
16V
C2210
0.1uF
16V
C2207
0.1uF
16V
C2206
0.1uF
16V
C2202
0.1uF
16V
C2190
0.1uF
16V
C2211
0.1uF
16V
C2195
0.1uF
16V
C2187
0.1uF
16V
C2193
0.1uF
16V
+5V_GENERAL
TS_0
005:AF17
TS_1
005:AF17
TS_2
005:AF17
TS_3
005:AF17
TS_4
005:AF16
TS_5
005:AF16
TS_6
005:AF16
TS_7
005:AF16
R2446
0
R2447
0
R2448
0
R2449
0
R2441
100
R2415
22
R2422
10K
L1227
MLB-201209-0120P-N2
L1228
MLB-201209-0120P-N2
L1230
MLB-201209-0120P-N2
L1231
MLB-201209-0120P-N2
L1236
MLB-201209-0120P-N2
L1234
MLB-201209-0120P-N2
L1232
MLB-201209-0120P-N2
L1235
MLB-201209-0120P-N2
L1233
MLB-201209-0120P-N2
R2563
4.7K
C2179
1uF
25V
OPT
C2255
1uF
25V
OPT
IC1210
MAX809RTR
1
GND
3
VCC
2
RESET
R2564
100
OPT
3.3V_Proidiom
C2185
1uF
50V
C2192
1uF
50V
FPGA
10
14
FPGA
I2C
27MHz
RESET
FPGA POWER
37LH250H
INNER LAYER PATERN
09.05.19
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