37LH35FD (CHASSIS:LJ91A) - LG TV Service Manual (repair manual). Page 27

Read LG 37LH35FD (CHASSIS:LJ91A) Service Manual online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
BCM3556_AUDIO_XTAL
2009.01.20
BRAZIL DVR DV
MNT_VOUT
LVDS_TX_0_DATA0_N
7:E7
AV1_L_IN
14:A5
C215
0.1uF
X201
54MHz
C213
0.01uF
D3.3V
R233
1K
LVDS_TX_0_DATA3_N
7:E7
C258
0.1uF
C278
4.7uF
AV1_R_IN
14:A5
LVDS_TX_1_CLK_N
7:D7
SIDE_L_IN
14:A4
LVDS_TX_0_DATA2_P
7:E7
R205
22
LVDS_TX_1_CLK_P
7:D7
C283
1000pF
R229
10K
C296
33pF
C248
1000pF
C256
0.1uF
A3.3V
C297
4.7uF
R200
1.5K
JP201
C250
0.1uF
L206
1008LS-272XJLC
A2.5V
A1.2V
54MHz_XTAL_N
D3
PC_L_IN
14:A3
LVDS_TX_1_DATA0_N
7:D7
C245
4.7uF
COMP1_R_IN
14:A6
C294
0.1uF
C289
0.1uF
C
2
3
6
0
.
1
u
F
LVDS_TX_0_DATA4_N
7:E7
R211
22
C265
0.1uF
R201
1.5K
IC100
BCM3556
VDDC_1
H8
VDDC_2
J8
VDDC_3
K8
VDDC_4
L8
VDDC_5
M8
VDDC_6
N8
VDDC_7
P8
VDDC_8
R8
VDDC_9
AA8
VDDC_10
H9
VDDC_11
H10
VDDC_12
H11
VDDC_13
H12
VDDC_14
H13
VDDC_15
H14
VDDC_16
H15
VDDC_17
H16
VDDC_18
H17
VDDC_19
H18
VDDC_20
H19
VDDC_21
H21
VDDC_22
J21
VDDC_23
K21
VDDC_24
L21
VDDC_25
M21
VDDC_26
N21
VDDC_27
P21
VDDC_28
R21
VDDC_29
T21
VDDC_30
U21
VDDC_31
V21
VDDC_32
W21
VDDC_33
Y21
AGC_VDDO
AH27
VDDO_1
AA12
VDDO_2
AA13
VDDO_3
AA18
VDDO_4
AA19
VDDO_5
E28
VDDO_6
L28
VDDO_7
U28
VDDO_8
AB28
DDRV_1
A9
DDRV_2
G9
DDRV_3
G11
DDRV_4
G13
DDRV_5
A14
DDRV_6
G15
DDRV_7
G17
DDRV_8
A19
DDRV_9
G19
L204
BLM18PG121SN1D
A2.5V
BCM3549_JTAG_TMS
E5
USB_DM2
C
2
3
9
0
.
1
u
F
LVDS_TX_1_DATA0_P
7:D7
D3.3V
C249
4.7uF
C2006
0.01uF
C270
0.1uF
USB_DP2
C
2
9
9
1
2
p
F
C276
0.1uF
LVDS_TX_1_DATA1_N
7:D7
C264
0.1uF
C247
0.1uF
L207
BLM18PG121SN1D
A1.2V
D1.2V
R232
1K
OPT
C261
0.1uF
R236
1K
OPT
C267
0.01uF
C254
0.1uF
C285
0.01uF
COMP1_L_IN
14:A6
C
2
0
0
2
0
.
1
u
F
LVDS_TX_1_DATA2_P
7:D7
C266
0.1uF
R222
1K
COMP2_R_IN
14:A5
COMP2_L_IN
14:A5
LVDS_TX_0_DATA2_N
7:E7
C288
0.1uF
LVDS_TX_1_DATA3_N
7:D7
R235
1K
C253
0.1uF
A1.2V
A1.2V
A3.3V
C252
0.1uF
D1.8V
BCM3549_JTAG_TRSTb
E5
L200
BLM18PG121SN1D
R210
120
LVDS_TX_1_DATA4_P
7:D7
C208
4.7uF
USB_DM1
USB_DP1
D1.8V
C263
4.7uF
A3.3V
C280
4.7uF
LVDS_TX_1_DATA4_N
7:D7
C275
0.1uF
C
2
9
8
1
2
p
F
C257
0.01uF
C246
0.1uF
SYS_RESETb
9:B7;14:I27
C2003
0.1uF
D3.3V
USB_PWRON2
14:AH21
R220
560
LVDS_TX_0_DATA3_P
7:E7
A2.5V
LVDS_TX_0_CLK_N
7:E7
C
2
0
7
0
.
1
u
F
C241
4.7uF
C216
0.1uF
C231
10uF
LVDS_TX_1_DATA1_P
7:D7
C273
0.1uF
P200
TJC2508-4A
ENG
1
2
3
4
C262
0.1uF
C282
1000pF
D1.8V
BCM3549_JTAG_TMS
G2
TU_SCLK
5:B6
R223
1K
54MHz_XTAL_P
D3
JTAG_RESETb
9:A7
LVDS_TX_0_DATA0_P
7:E7
D1.2V
IC100
BCM3556
PKT0_CLK
D23
PKT0_DATA
C24
PKT0_SYNC
B26
RMX0_CLK
A25
RMX0_DATA
B25
RMX0_SYNC
A26
POD2CHIP_MCLKI
G23
POD2CHIP_MDI0
D25
POD2CHIP_MDI1
D24
POD2CHIP_MDI2
C25
POD2CHIP_MDI3
E27
POD2CHIP_MDI4
E26
POD2CHIP_MDI5
D28
POD2CHIP_MDI6
D27
POD2CHIP_MDI7
D26
POD2CHIP_MISTRT
E23
POD2CHIP_MIVAL
E24
CHIP2POD_MCLKO
F25
CHIP2POD_MDO0
C27
CHIP2POD_MDO1
C26
CHIP2POD_MDO2
B28
CHIP2POD_MDO3
B27
CHIP2POD_MDO4
A27
CHIP2POD_MDO5
F24
CHIP2POD_MDO6
F23
CHIP2POD_MDO7
E25
CHIP2POD_MOSTRT
C28
CHIP2POD_MOVAL
A28
VDAC_AVDD2P5
AC18
VDAC_AVDD1P2
AF20
VDAC_AVDD3P3_1
AG20
VDAC_AVDD3P3_2
AG21
VDAC_AVSS_1
AF19
VDAC_AVSS_2
AD20
VDAC_AVSS_3
AE20
VDAC_RBIAS
AH22
VDAC_1
AH20
VDAC_2
AG19
VDAC_VREG
AH21
BSC_S_SCL
M25
BSC_S_SDA
M24
USB_AVSS_1
R6
USB_AVSS_2
T6
USB_AVSS_3
R7
USB_AVSS_4
T7
USB_AVSS_5
T8
USB_AVDD1P2
R3
USB_AVDD1P2PLL
U3
USB_AVDD2P5
T4
USB_AVDD2P5REF
T3
USB_AVDD3P3
R4
USB_RREF
U4
USB_DM1
V1
USB_DP1
V2
USB_DM2
U1
USB_DP2
U2
USB_MONCDR
T5
USB_MONPLL
R5
USB_PWRFLT_1
R1
USB_PWRFLT_2
R2
USB_PWRON_1
T2
USB_PWRON_2
T1
EPHY_VREF
P6
EPHY_RDAC
P5
EPHY_RDN
P3
EPHY_RDP
P2
EPHY_TDN
N3
EPHY_TDP
N2
EPHY_AVDD1P2
P1
EPHY_AVDD2P5
P4
EPHY_PLL_VDD1P2
N4
EPHY_AGND_1
N1
EPHY_AGND_2
N5
EPHY_AGND_3
P7
AUDMX_LEFT1
AE6
AUDMX_RIGHT1
AD7
AUDMX_INCM1
AF6
AUDMX_LEFT2
AH4
AUDMX_RIGHT2
AG5
AUDMX_INCM2
AG4
AUDMX_LEFT3
AG6
AUDMX_RIGHT3
AF7
AUDMX_INCM3
AE7
AUDMX_LEFT4
AH5
AUDMX_RIGHT4
AG7
AUDMX_INCM4
AH6
AUDMX_LEFT5
AD8
AUDMX_RIGHT5
AF8
AUDMX_INCM5
AE8
AUDMX_LEFT6
AH7
AUDMX_RIGHT6
AH8
AUDMX_INCM6
AG8
AUDMX_AVSS_1
AF5
AUDMX_AVSS_2
AB9
AUDMX_AVSS_3
AA10
AUDMX_AVSS_4
AB10
AUDMX_AVSS_5
AA11
AUDMX_AVSS_6
AB11
AUDMX_LDO_CAP
AC8
AUDMX_AVDD2P5
AE5
LVDS_TX_0_DATA0_P
B4
LVDS_TX_0_DATA0_N
A4
LVDS_TX_0_DATA1_P
C6
LVDS_TX_0_DATA1_N
B6
LVDS_TX_0_DATA2_P
B3
LVDS_TX_0_DATA2_N
A3
LVDS_TX_0_DATA3_P
A1
LVDS_TX_0_DATA3_N
A2
LVDS_TX_0_DATA4_P
D5
LVDS_TX_0_DATA4_N
D6
LVDS_TX_0_CLK_P
C5
LVDS_TX_0_CLK_N
B5
LVDS_TX_1_DATA0_P
B1
LVDS_TX_1_DATA0_N
B2
LVDS_TX_1_DATA1_P
C2
LVDS_TX_1_DATA1_N
C3
LVDS_TX_1_DATA2_P
D1
LVDS_TX_1_DATA2_N
D2
LVDS_TX_1_DATA3_P
E1
LVDS_TX_1_DATA3_N
E2
LVDS_TX_1_DATA4_P
E3
LVDS_TX_1_DATA4_N
E4
LVDS_TX_1_CLK_P
D3
LVDS_TX_1_CLK_N
D4
LVDS_PLL_VREG
F5
LVDS_TX_AVDDC1P2
F1
LVDS_TX_AVDD2P5_1
F4
LVDS_TX_AVDD2P5_2
F2
LVDS_TX_AVSS_1
C1
LVDS_TX_AVSS_2
F3
LVDS_TX_AVSS_3
C4
LVDS_TX_AVSS_4
A5
LVDS_TX_AVSS_5
E5
LVDS_TX_AVSS_6
E6
LVDS_TX_AVSS_7
D7
LVDS_TX_AVSS_8
E7
LVDS_TX_AVSS_9
F7
LVDS_TX_AVSS_10
G7
LVDS_TX_AVSS_11
H7
CLK54_AVDD1P2
AD27
CLK54_AVDD2P5
AD28
CLK54_AVSS
AD26
CLK54_XTAL_N
AC26
CLK54_XTAL_P
AC27
CLK54_MONITOR
AE25
PM_OVERRIDE
Y23
VCXO_AGND_1
AA23
VCXO_AGND_2
AB24
VCXO_AGND_3
AC24
VCXO_AVDD1P2
AF25
VCXO_PLL_AUDIO_TESTOUT
AF24
RESET_OUTB
P24
RESETB
F6
NMIB
N24
TMODE_0
J5
TMODE_1
J4
TMODE_2
J6
TMODE_3
J3
SPI_S_MISO
V25
POR_OTP_VDD2P5
AH3
POR_VDD1P2
AB8
EJTAG_TCK
H4
EJTAG_TDI
H3
EJTAG_TDO
H2
EJTAG_TMS
H1
EJTAG_TRSTB
G1
EJTAG_CE0
H6
EJTAG_CE1
H5
PLL_MAIN_AVDD1P2
AB26
PLL_MAIN_AGND
AC25
PLL_MAIN_MIPS_EREF_TESTOUT
AB27
PLL_RAP_AVD_TESTOUT
M6
PLL_RAP_AVD_AVDD1P2
N6
PLL_RAP_AVD_AGND
N7
BYP_CPU_CLK
AA24
BYP_DS_CLK
Y24
BYP_SYS216_CLK
AE24
BYP_SYS175_CLK
AD25
BCM3549_JTAG_TDO
E5
LVDS_TX_0_DATA4_P
7:E7
LVDS_TX_0_CLK_P
7:E7
R226
1K
OPT
IC100
BCM3556
DVSS_1
AD5
DVSS_2
AD6
DVSS_3
J7
DVSS_4
K7
DVSS_5
L7
DVSS_6
M7
DVSS_7
AB7
DVSS_8
AC7
DVSS_9
G8
DVSS_10
D9
DVSS_11
AA9
DVSS_12
G10
DVSS_13
A11
DVSS_14
L11
DVSS_15
M11
DVSS_16
N11
DVSS_17
P11
DVSS_18
R11
DVSS_19
T11
DVSS_20
U11
DVSS_21
V11
DVSS_22
D12
DVSS_23
G12
DVSS_24
L12
DVSS_25
M12
DVSS_26
N12
DVSS_27
P12
DVSS_28
R12
DVSS_29
T12
DVSS_30
U12
DVSS_31
V12
DVSS_32
L13
DVSS_33
M13
DVSS_34
N13
DVSS_35
P13
DVSS_36
R13
DVSS_37
T13
DVSS_38
U13
DVSS_39
V13
DVSS_40
G14
DVSS_41
L14
DVSS_42
M14
DVSS_43
N14
DVSS_44
P14
DVSS_45
R14
DVSS_46
T14
DVSS_47
U14
DVSS_48
V14
DVSS_49
L15
DVSS_50
M15
DVSS_51
N15
DVSS_52
P15
DVSS_53
R15
DVSS_54
T15
DVSS_55
U15
DVSS_56
V15
DVSS_57
A16
DVSS_58
G16
DVSS_59
L16
DVSS_60
M16
DVSS_61
N16
DVSS_62
P16
DVSS_63
R16
DVSS_64
T16
DVSS_65
U16
DVSS_66
V16
DVSS_67
AA16
DVSS_68
D17
DVSS_69
L17
DVSS_70
M17
DVSS_71
N17
DVSS_72
P17
DVSS_73
R17
DVSS_74
T17
DVSS_75
U17
DVSS_76
V17
DVSS_77
AA17
DVSS_78
AC19
DVSS_79
G18
DVSS_80
L18
DVSS_81
M18
DVSS_82
N18
DVSS_83
P18
DVSS_84
R18
DVSS_85
T18
DVSS_86
U18
DVSS_87
V18
DVSS_88
D20
DVSS_89
G20
DVSS_90
H20
DVSS_91
A21
DVSS_92
E21
DVSS_93
F21
DVSS_94
G21
DVSS_95
E22
DVSS_96
F22
DVSS_97
G22
DVSS_98
H22
DVSS_99
J22
DVSS_100
K22
DVSS_101
L22
DVSS_102
M22
DVSS_103
N22
DVSS_104
P22
DVSS_105
R22
DVSS_106
T22
DVSS_107
U22
DVSS_108
V22
DVSS_109
W22
DVSS_110
Y22
DVSS_111
AA22
DVSS_112
W23
DVSS_113
AB23
DVSS_114
F28
DVSS_115
M28
DVSS_116
T28
DVSS_117
AC28
C290
0.1uF
C223
0.1uF
R237
1K
OPT
JP203
USB_PWRFLT2
14:AI20
R228
75
1%
OPT
R215
2.7K
C281
1000pF
C292
0.1uF
C244
0.1uF
C243
0.1uF
C234
0.1uF
PC_INCM
14:A3
LVDS_TX_0_DATA1_P
7:E7
SIDE_R_IN
14:A4
C2005
0.01uF
54MHz_XTAL_P
H4
R208
604
1%
C2004
33uF
C
2
0
9
0
.
1
u
F
C251
0.1uF
C259
0.1uF
R221
2.7K
C242
4.7uF
C228
10uF
OPT
BCM3549_JTAG_TCK
E4
LVDS_TX_1_DATA2_N
7:D7
C287
33uF
R234
1K
C286
33uF
D1.2V
D3.3V
C271
10uF
C255
0.1uF
D3.3V
R209
3.9K
1%
C214
0.1uF
C272
0.1uF
L201
BLM18PG121SN1D
TU_SDATA
5:B6
PC_R_IN
14:A3
C237
0.1uF
A1.2V
LVDS_TX_1_DATA3_P
7:D7
R218
240
D3.3V
BCM3549_JTAG_TDO
G2
C
2
9
5
0
.
1
u
F
BCM3549_JTAG_TCK
G2
BCM3549_JTAG_TDI
E5
C212
4.7uF
C233
0.1uF
R219
1K
JP202
C238
0.1uF
A2.5V
C240
4.7uF
A1.2V
C200
4.7uF
BCM3549_JTAG_TRSTb
G2
C
2
0
0
1
0
.
1
u
F
TU_SYNC
5:B6
A2.5V
A2.5V
JP200
D3.3V
D3.3V
L202
BLM18PG121SN1D
BCM3549_JTAG_TDI
G2
C
2
0
2
0
.
1
u
F
C235
4.7uF
C201
100pF
L203
BLM18PG121SN1D
A1.2V
54MHz_XTAL_N
H4
C
2
0
3
0
.
1
u
F
LVDS_TX_0_DATA1_N
7:E7
A2.5V
C284
0.01uF
R227
1K
R225
4.7K
OPT
A1.2V
R224
4.7K
A1.2V
C2000
4.7uF
C219
0.1uF
SIDE_INCM
14:A4
C2010
0.15uF
C2014
0.47uF
C2007
0.15uF
C2011
0.47uF
C2008
0.15uF
C2012
0.47uF
AV1_INCM
14:A5
COMP1_INCM
14:A6
COMP2_INCM
14:A5
C2013
0.47uF
C2009
0.15uF
C2015
0.15uF
C2016
0.47uF
R216
51
R214
51
R207
51
R212
51
R204
51
R213
51
R217
51
R203
51
R202
51
R206
51
C226
47nF
C268
47nF
C260
47nF
C230
47nF
C269
47nF
C227
47nF
C225
47nF
C224
47nF
C232
47nF
C229
47nF
C204
15nF
C220
15nF
C210
15nF
C217
15nF
C211
15nF
C221
15nF
C205
15nF
C222
15nF
5
0
V
C218
15nF
C206
15nF
10
17
JTAG
54MHz X-TAL
MOVE BOTTOM SIDE TO TOP SIDE OF PCB
There are Lots of problem using fundamental crystal
For using T32 Debugger
EJTAG_CE[1:0] = 01
BBS DEBUG
INCM
Place this TP,Resistors  <<--
near Audio connector.
INCM
Route INCM between 
associated Left and Right 
signals of same channel.
Route all 3 traces 
as matched lines.
Shield all lines!!!
Example)
<<---- Left signal ----<<
<<---- INCM -----------<<
<<---- Right signal ---<<
-->> Place capacitors very close to BCM3556
A
B
C
D
E
F
G
H
I
J
K
1
2
3
4
5
6
7
Page of 35
Display

Click on the first or last page to see other 37LH35FD (CHASSIS:LJ91A) service manuals if exist.