Read LG 37LD650H (CHASSIS:LD03Z) Service Manual online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
PANEL_VCC
LVDS_TX_0_DATA0_N
LVDS_TX_1_DATA1_P
10K
LVDS_SEL_LOW
R3543
LVDS_TX_0_DATA4_P
LVDS_TX_1_CLK_N
0
OPT
R3540
LVDS_TX_1_DATA3_N
0 . 1 u F
16V
16V
C3515
FHD
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA2_N
TF05-51S
P3504
WAFER_FHD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
LVDS_TX_1_DATA4_N
LVDS_TX_0_CLK_P
LVDS_TX_0_DATA2_N
1000pF
50V
50V
C3514
FHD
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA3_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA1_P
0
OPT
R3539
+3.3V_NORMAL
SCAN_BLK1/OPC_OUT
LVDS_TX_1_DATA4_P
LVDS_TX_1_CLK_P
LVDS_TX_1_DATA0_P
LVDS_TX_0_DATA1_N
10uF
16V
16V
C3513
OPT
LVDS_TX_0_CLK_N
3.3K
LVDS_SEL_HIGH
R3542
PWM_DIM
LVDS_TX_0_DATA0_P
0
OPT
R3538
LVDS_TX_0_DATA2_P
LVDS_TX_1_DATA2_P
CIC21J501NE
L3502
WAFER_FHD
0
OPT
R3534
OPC_EN
+3.3V_NORMAL
3.3K
OPC
R3537
0 OPT
R3545
+3.3V_NORMAL
10K
LVDS_SEL_LOW
R3549
120-ohm
WAFER_HD
L3503
0
OPT
R3547
0 WAFER_HD
R3544
OPC_EN
PWM_DIM
3.3K
LVDS_SEL_HIGH
R3548
PANEL_VCC
FF10001-30
WAFER_HD
P3500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0 OPT
R3546
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA0_N
LVDS_TX_0_CLK_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_CLK_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
SCAN_BLK1/OPC_OUT
0
8BIT-0 OHM
R3541
10K
R3541-*1
10BIT-OPEN
0 . 1 u F
16V
16V
C3518
HD
1000pF
50V
50V
C3517
HD
10uF
16V
16V
OPT
C3516
OPEN
HIGH
[ 5 1 P i n L V D S C o n n e c t o r ]
( F o r F H D 6 0 / 1 2 0 H z )
From BCM FHD
JEIDA
** LVDS_SELECTION_LGD
GND
GND(NC)
BIT_SEL
VESA
10BIT
8BIT
35
LVDS_SEL
[ 3 0 P i n L V D S C o n n e c t o r ]
(For HD 60Hz_Normal)
MODULE
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
Chameleon(EU_GP2_BCM3556)
2 0 1 0 . 0 1 . 2 3
LVDS WAFER
xxLD650H-ZA
** LVDS_SELECTION_AUO
GND
NS
JEIDA
HIGH(NC)
NS
JEIDA
HIGH(NC)
** LVDS_SELECTION_AUO
GND
DS OUT
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