Read LG 32LV265C (CHASSIS:LP9DC) Service Manual online
Block diagram
EE
PR
O
M
R
1EX
2400
2
R
G
B
-P
C
(J
K
20
2)
Tu
ne
r
(T
U
600
)
C
om
po
ne
nt
(J
K
10
1)
A
V_
LI
N
/R
IN
:
500
m
Vrm
s
SP
K
_L
SP
K
_R
A
V_
VI
N
:
1V
pp
N
TP
71
00
C
O
M
P_
Y/
Pb
/P
r
HD
M
I_
D
A
TA
0
TU
_M
A
IN
A
V_
VI
N
C
O
M
P_
LI
N
/R
IN
L_
C
H
R
_C
H
A
V_
LI
N
/R
IN
PC
-S
O
UN
D
(J
K
20
3)
I2
S_
M
C
LK
I2
S_
SD
O
I2
S_
W
S
I2
S_
SCK
TM
D
S
EEP
R
O
M
(A
T2
4C
25
6C
)
Se
ria
l Fl
as
h
(M
X25
L6
4)
EEP
R
O
M
HDC
P
(2
4W
C
08
)
EEP
_S
C
L/
SD
A
EEP
_S
C
L/
SD
A
TX
C
E2
±
TX
C
E3
±
TX
C
LK
E
±
TX
C
E1
±
TX
C
E0
±
TX
C
O
1
±
TX
C
O
3
±
TX
C
O
2
±
TX
C
O
0
±
TX
C
LK
O
±
M
_S
C
L/
SD
A
M
ai
n
sc
al
er
M
atri
x
(L
G
E476
7A
)
(IC
800
)
IC
30
2
TU
600
IC
80
2
IC
80
3
IC
80
1
IC
50
1
M
_S
C
L/
SD
A
SIDE
RE
A
R
HD
M
I3
(J
K
30
3)
U
SB
(J
K
20
4)
R
S-
232
C
(J
K
20
0)
HD
M
I1
(J
K
30
1)
HD
M
I2
(J
K
30
2)
EE
PR
O
M
R
1EX
2400
2
IC
30
1
EE
PR
O
M
R
1EX
2400
2
IC
30
0
DDC
_S
C
L/
SD
A
1
DDC
_S
C
L/
SD
A
2
DDC
_S
C
L/
SD
A
3
C
on
tr
ol
le
r
ST
3232
CD
R
IC
20
0
R
XD
/T
XD
EE
PR
O
M
R
1EX
2400
2
IC
20
1
D
SU
B
_S
C
L/
SD
A
SP
I_
C
Z/
D
O
SP
I_
C
LK
/D
I
HD
M
I_
D
A
TA
1
HD
M
I_
D
A
TA
2
U
SB
DN
/D
P
PC
_R
/G/
B
PC
_VS
/H
S
TX
D
/R
XD
PC
_A
UD
_L
/R
TX
C
O
4
±
TX
C
E4
±
P40
2
P40
5
HD LV
DS
con
nect
or
DDR
2 S
D
R
AM
(512
M
B
yt
e)
IC
90
0
DDR
2_
C
K
E
DDR
2_
W
EZ
DDR
2_
D
Q
S0
±
DDR
2_
M
C
LK
DDR
2_
B
A
0/
1
DDR
2_
D
Q
S1
±
DDR
2_
OD
T
DDR
2_
D
Q
M
0/
1
51P
FHD
LV
DS
con
nect
or
P40
1
P40
4
30P
FHD
LV
DS
con
nect
or
A
ud
io
o
ut
_L
/R
C
O
M
PO
N
EN
T_
L/
R
:
500
m
Vrm
s
C
O
M
PO
N
EN
T_
Y/P
b/
Pr
:
1/
0.
7V
pp
A
ud
io
o
ut
_L
/R
:
500
m
Vrm
s
A
V
(J
K
10
3)
A
ud
io
o
ut
(J
K
10
2)
O
P
A
m
p
A
S324
M
TR
IC
50
2
M
N
T_
L/
R
_A
M
P
A
ud
io
A
m
p
TP
A
31
24
IC
210
0
H
ote
l op
tion
fo
r C
hi
na
M
A
IN
_S
IF
LE
D
dr
ov
er
(M
AX
16
814
)
IC
10
0
P77
01
5P
con
nect
or
PW
M
_D
IM
W
LE
D
_E
N
A
B
LE
(IN
V_
C
TL
)
12
P/
15
P
con
ne
ct
or
P400
(15
P)
P403
(12
P)
SUB
_S
C
L/
SD
A
, L
ED
_R
IR
, K
EY
1/
2
O
nl
y
fo
r 1
9”
/22
”
TN
m
odu
le
- 2
1 -
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