22LN4060 (CHASSIS:LM91P) - LG TV Service Manual (repair manual). Page 24

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THERMAL
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
MAIN SOC
RXA3+
RXA3-
RXACK+
RXACK-
RXA2+
RXA2-
RXA1+
RXA1-
RXA0+
RXA0-
R507
68
C512
0.047uF
IF_AGC
R505
33
SPI_DO
+3.5V_ST
LED_B
R577
4.7K
R578
22
IR
EEP_SDA
+3.5V_ST
KEY2
VDDC
R536
22
R542
100
HW_RESET
KEY1
C563
0.1uF
16V
R546
100
IF_N
SPI_DI
+1.2V_VDDC
DSUB_SCL
IF_P
R569
4.7K
+3.3V_M
USB_DN
I2S_MCLK
+1.8V_M
EEP_SCL
HW_RESET
SPI_CZ
USB_DP
C514
0.047uF
R512
1M
R541
100
R579
22
AVDD_DDR
R537
22
DSUB_SDA
VDDC_3.3
SPI_CLK
100
R543
100
R544
SW_RESET
EEP_SDA
100
R525
100
R526
EEP_SCL
PWM_DIM
RXA0+
RXA0-
RXA1+
RXA1-
RXA2+
RXA2-
RXACK+
RXACK-
RXA3+
RXA3-
+3.5V_ST
R538
4.7K
R539
4.7K
R517
10K
C511
0.047uF
R503
68
R530
100
FLASH_WP
PANEL_ON
POWER_SW
R528
100
INV_ON
R535
1K
R534
1K
AVDD33_DEMOD
R533
0
C517
0.1uF
HW_OPT1
VDDC
C547
0.1uF
VDDC
C544
0.1uF
VDDC
C506
0.1uF
C549
0.1uF
AVDD_DDR
VDDC_3.3
C548
0.1uF
AU_3.3V
3.3V_DMPLL
AU_3.3V
C515
0.1uF
C505
0.1uF
VDDC_3.3
C507
0.1uF
VDDC_3.3
C546
0.1uF
VDDC_3.3
VDDC_3.3
C545
0.1uF
C543
0.1uF
VDDC_3.3
AVDD33_DEMOD
3.3V_DMPLL
C532
0.1uF
C533
0.1uF
C573
22pF
READY
C574
22pF
READY
0.1uF
C535
0.1uF
C534
R550
4.7K
READY
R551
4.7K
+3.3V_M
HW_OPT1
R545
100
L500
120-ohm
L503
120-ohm
L505
120-ohm
L504
120-ohm
L501
120-ohm
L502
120-ohm
L506
120-ohm
R519
4.7K
+3.5V_ST
R518
100
TUNER_SDA
100
R520
TUNER_SCL
100
R521
I2S_SCK
I2S_SDO
I2S_WS
C542
0.1uF
AVDD_DDR
TUNER_RESET
C572
0.1uF
16V
0
R524
C551
220pF
READY
50V
R513
100
R514
100
IC504
APX803D29
1
GND
3
VCC
2
RESET
+3.5V_ST
0.1uF
C560
R561
10K
POWER_DET
R562
470
R549
100
R527
10K
R540
1K
R515
68
READY
100
R529
100
R522
R531
10K
READY
LED_AMBER
IC501
LGE6841 (ATV_13)
1
DDCDD_CK
2
RX2N_D
3
RX2P_D
4
HOTPLUG_A
5
RXCKN_A
6
RXCKP_A
7
RX0N_A
8
RX0P_A
9
AVDD_MOD_1
10
RX1N_A
11
RX1P_A
12
DDCDA_DA
13
RX2N_A
14
RX2P_A
15
DDCDA_CK
16
ARC
17
VDD
18
AVDD3P3_ADC
19
HSYNC1
20
BIN1P
21
SOGIN1
22
GIN1P
23
GIN1M
24
RIN1P
25
VSYNC1
26
CVBS1
27
CVBS0
28
VCOM
29
CVBSOUT1
30
AVDD_AU33
31
AUREF
32
VAG
33
LINEIN_L1
34
LINEIN_R1
35
LINEIN_L3
36
LINEIN_R3
37
LINEOUTL3
38
LINEOUTR3
39
XTALO
40
XTALI
41
AVDD3P3_DMPLL
42
AVDD3P3_DADC
43
VIFP
44
VIFM
45
IFAGC
46
VSS
47
AVDD_DDR
48
GPIO55/I2S_OUT_WS
49
GPIO56
50
GPIO57/I2S_OUT_BCK
51
GPIO58/I2S_OUT_SD
52
GPIO60
53
GPIO61
54
VDDP
55
VDDC_1
56
LVA4P
57
LVA4M
58
LVA3P
59
LVA3M
60
LVACLKP
61
LVACLKM
62
AVDD_MOD_2
63
LVA2P
64
LVA2M
65
LVA1P
66
LVA1M
67
LVA0P
68
LVA0M
69
LVB4P
70
LVB4M
71
LVB3P
72
LVB3M
73
LVBCKP
74
LVBCKM
75
LVB2P
76
LVB2M
77
AVDD_MOD_3
78
LVB1P
79
LVB1M
80
LVB0P
81
LVB0M
82
VDDC_2
83
INT/GPIO65
84
GPIO7
85
GPIO6
86
GPIO5
87
GPIO4
88
GPIO3
89
GPIO2
90
GPIO1
91
GPIO0
92
PWM2/GPIO24
93
PWM3/GPIO25
94
SPI_CK
95
SPI_DI
96
SPI_DO
97
SPI_CZ
98
USB0_DM
99
USB0_DP
100
AVDD_MOD_4
101
GPIO63
102
GPIO64
103
TESTPIN
104
PWM0/GPIO26
105
PWM1/GPIO25
106
DDCA_CK
107
DDCA_DA
108
GPIO67
109
AVDD_DDR_2
110
SAR0/GPIO75
111
SAR1/GPIO74
112
SAR2/GPIO73
113
SAR3/GPIO72
114
GPIO68
115
GPIO69/I2S_OUT_MCK
116
GPIO70
117
IRIN
118
CEC
119
HWRESET
120
GND
121
HOTPLUG_D
122
RXCKN_D
123
RXCKP_D
124
RX0N_D
125
RX0P_D
126
DDCDD_DA
127
RX1N_D
128
RX1P_D
129
[EP]
R509
100
R508
100
100
R516
C522
220pF
R511
220K
R510
220K
C523
220pF
MNT_L_AMP
MNT_R_AMP
MUTE_AOUT
C516
10uF
C504
10uF
16V
C502
10uF
16V
C501
10uF
16V
C561
4.7uF
10V
C562
4.7uF
10V
C503
4.7uF
10V
R553
0.1uF
POWER_DET
R576
100
C576
0.1uF
16V
READY
SPI_CZ
R575
100
R574
100
IC502
W25Q64FVSSIG
3
WP[IO2]
2
DO[IO1]
4
GND
1
CS
5
DI[IO0]
6
CLK
7
%HOLD[IO3]
8
VCC
R581
10K
SPI_DI
SPI_CLK
SPI_DO
C575
0.1uF
16V
FLASH_WP
R572
100
R571
100
+3.5V_ST
C541
0.022uF
16V
C520 2.2uF
C521
2.2uF
C552
2.2uF
10V
READY
JP501
JP502
JP503
JP504
L521
READY
100NH
IC503
R1EX24256BSAS0A
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
AUDIO_LIN
AUDIO_RIN
CVBS_VIN
R504
0
R506
0
READY
C530
15pF
C531
15pF
X501
24MHz
C536
33pF
C537
33pF
R564
10
R563
62K
VCC_AD
C553
0.1uF
R555
22K
1%
R554
7.5K
1%
AUAMP_SCL
100
R501
READY
AUAMP_SDA
100
R502
READY
MAIN SOC
5  8
SERIAL FLASH(8MB)
EEPROM(256K)
*H/W OPTION
Close to MSTAR
H/W RESET
MSTAR Vcc
ST 1.26V
DDR 1.8V
Close to MSTAR
ST 3.3V
HD
FHD
LOW
HIGH
HW_OPT
EAX65303201
LN4050
2012/12/18
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