15EL950N-ZA, 15EL9500-ZA (CHASSIS:OD01J) - LG TV Service Manual (repair manual). Page 23

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[E1]
[D1]
[L9]
[N5]
[N4]
[N12]
[N13]
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
URSA_B+[2]
URSA_B-[2]
URSA_BCK+
URSA_BCK-
URSA_B+[3]
URSA_B-[3]
URSA_A+[0]
URSA_A-[0]
URSA_A+[1]
URSA_A-[1]
URSA_A+[2]
URSA_A-[2]
URSA_ACK+
URSA_ACK-
URSA_A+[3]
URSA_A-[3]
URSA_B+[0]
URSA_B-[0]
URSA_B+[1]
URSA_B-[1]
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]
URSA_A[8]
URSA_A[11]
URSA_A[1]
URSA_A[10]
URSA_A[5]
URSA_A[9]
URSA_A[12]
URSA_A[7]
URSA_A[3]
URSA_DQ[0-31]
URSA_DQ[20]
URSA_DQ[19]
URSA_DQ[17]
URSA_DQ[22]
URSA_DQ[27]
URSA_DQ[28]
URSA_DQ[25]
URSA_DQ[30]
URSA_DQ[31]
URSA_DQ[24]
URSA_DQ[26]
URSA_DQ[29]
URSA_DQ[23]
URSA_DQ[16]
URSA_DQ[18]
URSA_DQ[21]
URSA_DQ[4]
URSA_DQ[3]
URSA_DQ[1]
URSA_DQ[6]
URSA_DQ[11]
URSA_DQ[12]
URSA_DQ[9]
URSA_DQ[14]
URSA_DQ[15]
URSA_DQ[8]
URSA_DQ[10]
URSA_DQ[13]
URSA_DQ[7]
URSA_DQ[0]
URSA_DQ[2]
URSA_DQ[5]
URSA_A+[3]
URSA_B+[3]
URSA_BCK-
URSA_A-[2]
URSA_A-[3]
URSA_B+[1]
URSA_A+[0]
URSA_B-[2]
URSA_B+[0]
URSA_A+[1]
URSA_ACK+
URSA_A-[0]
URSA_B+[2]
URSA_ACK-
URSA_A+[2]
URSA_BCK+
URSA_B-[0]
URSA_A-[1]
URSA_B-[3]
URSA_B-[1]
L903
BLM18PG121SN1D
+3.3V
+1.26V_MEMC
+1.8V_MEMC
L901
BLM18PG121SN1D
MEMC_RXE1+
MEMC_RXE1-
MEMC_RXE3+
MEMC_RXE2+
MEMC_RXE3-
MEMC_RXE2-
MEMC_RXO0-
MEMC_RXEC+
MEMC_RXO1-
MEMC_RXO1+
MEMC_RXE4+
MEMC_RXO0+
MEMC_RXEC-
MEMC_RXE4-
MEMC_RXO4-
MEMC_RXO3+
MEMC_RXOC-
MEMC_RXOC+
MEMC_RXO2+
MEMC_RXO4+
MEMC_RXO3-
MEMC_RXO2-
+3.3V
+3.3V
URSA_RASZ
URSA_CASZ
URSA_WEZ
URSA_BA1
URSA_BA0
URSA_MCLKE
URSA_DQM1
URSA_DQM0
URSA_DQS0
URSA_DQSB0
URSA_DQS1
URSA_DQSB1
URSA_MCLK1
URSA_MCLKZ1
URSA_DQM3
URSA_DQM2
URSA_DQS2
URSA_DQSB2
URSA_DQS3
URSA_DQSB3
URSA_MCLK
URSA_MCLKZ
URSA_ODT
URSA_DQ[0-31]
URSA_A[0-12]
M_XTALI
M_XTALO
M_XTALO
M_XTALI
M_SPI_CZ
M_SPI_DO
M_SPI_CK
M_SPI_DI
M_SPI_CZ
M_SPI_DO
M_SPI_DI
M_SPI_CK
+3.3V
R931
820
R928
100
R919
100
R929
100
R922
100
R927
100
R920
100
R921
100
R924
100
R923
100
R925
100
R926
100
R918
100
MEMC_SDA
MEMC_SCL
MEMC_RXE0+
MEMC_RXE0-
C
9
4
1
0
.
1
u
F
C
9
4
7
0
.
1
u
F
C932
0.1uF
C956
0.1uF
C923
0.1uF
C957
0.1uF
C924
0.1uF
C928
0.1uF
C931
0.1uF
C
9
0
3
0
.
1
u
F
C
9
1
8
0
.
1
u
F
C
9
3
9
0.1uF
C925
0.1uF
C
9
3
4
0
.
1
u
F
C
9
4
2
0
.
1
u
F
C
9
0
4
0
.
1
u
F
C
9
4
8
0
.
1
u
F
C919
0.1uF
C929
0.1uF
C955
0.1uF
C953
0.1uF
C954
0.1uF
C
9
4
0
0.1uF
C920
0.1uF
C926
0.1uF
C949
0.1uF
C
9
4
6
0
.
1
u
F
C
9
3
8
0.1uF
C
9
4
3
0
.
1
u
F
C
9
4
4
0
.
1
u
F
C
9
3
6
0.1uF
C
9
3
5
0.1uF
C
9
3
3
0
.
1
u
F
C902
10uF
C910
10uF
C911
10uF
C930
10uF
C913
10uF
R930
0
R908
56
R909
56
R900
56
R901
56
R902
10K
R905
1M
R910
1K
R916
10K
R917
10K
C922
1uF
C945
1uF
R911
1K
OPT
R934
1K
R935
1K
OPT
R936
1K
R937
1K
OPT
C908
10uF
10V
C927
10uF
10V
C952
10uF
LVDS_SEL
IC900
W25X20AVSNIG
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
R914
100
R915
100
C905
0.1uF
C907
0.1uF
C915
0.1uF
+3.3V
+3.3V
+3.3V
+3.3V
X900
12MHz
C951
10uF
C950
10uF
C916
0.1uF
16V
C914
0.1uF
16V
C917
0.1uF
C921
0.1uF
C
9
3
7
0
.
1
u
F
C
9
0
6
0
.
1
u
F
R907
1K
R906
OPT
R904
1K
R903
OPT
+3.3V
IC901
LGE7329A
E1
SDAS
D1
SCLS
F1
GPIO[8]
G1
GPIO[9]
K8
GND_14
E5
VDDC_1
E2
GPIO[10]
F2
GPIO[11]
F3
GPIO[12]
G2
GPIO[13]
M4
GPIO[22]
M5
GPIO[23]
G3
GPIO[14]
E4
GPIO[15]
F4
GPIO[16]
G4
GPIO[17]
H4
GPIO[18]
J4
GPIO[19]
K4
GPIO[20]
L4
GPIO[21]
J6
VDDP_2
H9
GND_7
F6
VDDC_2
H1
MDATA[20]
H2
MDATA[19]
H3
MDATA[17]
J1
MDATA[22]
J2
MDATA[27]
J3
MDATA[28]
K1
MDATA[25]
K2
MDATA[30]
K6
AVDD_DDR_2
K3
DQM[3]
L1
DQM[2]
J8
GND_10
L2
DQS[2]
L3
DQSB[2]
L6
AVDD_DDR_4
L8
VDDP_3
H10
GND_8
M1
DQS[3]
M2
DQSB[3]
L7
AVDD_DDR_5
M3
MDATA[31]
N1
MDATA[24]
J9
GND_11
N2
MDATA[26]
N3
MDATA[29]
L10
AVDD_DDR_6
P1
MDATA[23]
R1
MDATA[16]
T1
MDATA[18]
T2
MDATA[21]
R2
MCLK[0]
P2
MCLKZ[0]
G7
GND_1
L9
AVDD_MEMPLL
N5
MVREF
N4
ODT
T3
RASZ
R3
CASZ
P3
MADR[0]
T4
MADR[2]
R4
MADR[4]
J10
GND_12
P4
MADR[6]
T5
MADR[8]
R5
MADR[11]
P5
WEZ
T6
BADR[1]
R6
BADR[0]
P6
MADR[1]
T7
MADR[10]
L11
AVDD_DDR_7
R7
MADR[5]
P7
MADR[9]
T8
MADR[12]
R8
MADR[7]
P8
MADR[3]
N8
MCLKE
K10
GND_16
F7
VDDC_3
T9
MDATA[4]
R9
MDATA[3]
K7
GND_13
P9
MDATA[1]
T10
MDATA[6]
K11
AVDD_DDR_3
R10
MDATA[11]
P10
MDATA[12]
T11
MDATA[9]
R11
MDATA[14]
J11
AVDD_DDR_1
P11
DQM[1]
T12
DQM[0]
R12
DQS[0]
P12
DQSB[0]
H11
VDDP_1
T13
DQS[1]
R13
DQSB[1]
P13
MDATA[15]
T14
MDATA[8]
R14
MDATA[10]
P14
MDATA[13]
T15
MDATA[7]
R15
MDATA[0]
P15
MDATA[2]
T16
MDATA[5]
R16
MCLK[1]
P16
MCLKZ[1]
N9
GPIO[26]
N10
GPIO[27]
N11
GND_17
M11
RESET
G6
VDDC_4
N12
GPIO[28]
N13
GPIO[29]
N14
GPIO[30]
L13
SCK
M13
SDI
M12
SDO
K13
CSZ
L12
PWM1
K12
PWM0
J13
GPIO[0]
H13
GPIO[1]
G13
GPIO[2]
F13
GPIO[3]
E13
GPIO[4]
F12
GPIO[5]
D14
GPIO[6]
E12
GPIO[7]
N6
GPIO[24]
H6
VDDC_5
N15
LVD4M
N16
LVD4P
M14
LVD3M
M15
LVD3P
F8
AVDD_33_1
M16
LVDCKM
L16
LVDCKP
L15
LVD2M
L14
LVD2P
G9
GND_3
K14
LVD1M
J14
LVD1P
J16
LVD0M
J15
LVD0P
H15
LVC4M
H16
LVC4P
H14
LVC3M
G14
LVC3P
G16
LVCCKM
G15
LVCCKP
F15
LVC2M
F16
LVC2P
F14
LVC1M
E14
LVC1P
E16
LVC0M
E15
LVC0P
G10
GND_4
F9
AVDD_33_2
D16
LVB4M
D15
LVB4P
C16
LVB3M
B16
LVB3P
A16
LVBCKM
A15
LVBCKP
B15
LVB2M
C15
LVB2P
D2
GPIO_3
E3
GPIO_10
E10
GPIO_11
D10
GPIO_7
D8
GPIO_5
D12
REXT
C14
LVB1M
C13
LVB1P
A13
LVB0M
B13
LVB0P
D7
GPIO_4
D9
GPIO_6
B12
LVA4M
A12
LVA4P
C12
LVA3M
C11
LVA3P
A11
LVACKM
B11
LVACKP
B10
LVA2M
A10
LVA2P
C10
LVA1M
C9
LVA1P
A9
LVA0M
B9
LVA0P
F10
AVDD_PLL
G8
GND_2
D11
GPIO_8
D13
GPIO_9
E11
GPIO_12
N7
GPIO[25]
D6
SCLM
D5
SDAM
A14
GPIO_1
B14
GPIO_2
D3
XIN
D4
XOUT
K16
GPIO_14
K15
GPIO_13
H7
GND_5
G11
AVDD_LVDS_2
B8
RO0N
A8
RO0P
C8
RO1N
C7
RO1P
A7
RO2N
B7
RO2P
B6
ROCKN
A6
ROCKP
C6
RO3N
C5
RO3P
A5
RO4N
B5
RO4P
H8
GND_6
F11
AVDD_LVDS_1
B4
RE0N
A4
RE0P
C4
RE1N
C3
RE1P
A3
RE2N
B3
RE2P
B2
RECKN
A2
RECKP
C2
RE3N
C1
RE3P
A1
RE4N
B1
RE4P
GND_9
J7
GND_15 K9
LVDS_SEL
1:AO32
R940
0
R939
4.7K
+12V_LOGIC
C960
1000pF
50V
+3.3V
C962
0.1uF
16V
R941
0
SCL2
C959
0.1uF
16V
Q900
2SC3052
+12V_PANEL
C963
1000pF
50V
C961
10uF
16V
L908
120OHM
L907
120OHM
SDA2
R938
1K
C964
10uF
16V
PANEL_RESET
1:AO17
MEMC_RESET 1:Z22
R933
10K
R932
100
+3.3V
P900
TF05-51S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
JP1
JP8
C912
22uF
10V
C909
22uF
10V
C901
20pF
C900
20pF
D808
30V
OPT
D809
30V
OPT
MDS62110207
M1
MDS62110207
M2
MDS62110207
M3
MDS62110207
M4
MDS62110207
M5
MDS62110207
M6
SPI FLASH
XTAL
FRC / LVDS
9
8   
OLED
GPIO8
HIGH
HIGH
I2C
EEPROM
SPI
LOW
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
PWM1
PWM0
09.08.31
Placed on SMD-TOP
Placed on SMD-TOP
PI Result
PI Result
PI Result
PI Result
0.8A(Typ)
LOW
  LG
(VESA)
HIGH
3.4A[300nit](Typ)
LVDS_SEL
  DISM
(JEIDA)
CONTACT TO MODULE FOR EMI
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