Read Harman Kardon CDR 20 (serv.man18) Service Tips online
LG Electronics DAV Engineering LAB.
DEC
DEC/
ENCODER
SRC
u-COM
FPGA
u-COM
HDCD
& MP3
Audio Signal Flow Diagram (CDR 30); Logical view point
I/O BOARD
FRONT BOARD
MDA_CLK
MDA_DATA
MDA_LRCK
OPT_FR_IN
DIG_IN
DIGI_3_IN
P_BCK/MP_CLK
P_DATA_MP_DATA
P_LRCK/MP_REQ
OPT_BK_IN
CDP_DOUT
CS_CLK
CS_LRCK
CS_DATA
F_CLK
F_LRCK
F_DATA
F_MPDATA
F_MPCLK
F_MPREQ
F_MPREQ
DA_PCLK
DA_PLRCK
DA_PDATA
DA_RCLK
DA_RLRCK
DA_RDATA
AD_CLK
AD_LRCK
AD_DATA
F_DOUTP
F_DOUTR
F_DOUTR
DOUT
ATAPI
(MP3)
SRC_TXP
SRC_RXP
SRC_CLK
SRC_LRCK
SRC_DATA
SRC_LRCK
SRC_DATA
V_LEVEL
ATAPI
(MP3)
OUTPUT
MUXs
HOST I/F
INPUT
ADDR
OUTPUT
ADDR
INPUT
MUXs
HOST I/F
HP_L
HP_R
HP_R
DIG_BK_IN
(HDCD INFOR)
KEY IN
(INPUT SELECT)
(INPUT SELECT)
CDR_MUTE
CDR_EMPH
CDR_EMPH
CDP_MUTE
CDP_EMPH
AUD_DA_MUTE
CDP_EMPH
AUD_DA_MUTE
EXTRMC
HOST I/F
NEW
FPGA
FPGA
¤ Volume Control Block
is excluded in this Diagram
is excluded in this Diagram
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