Read Harman Kardon AVR 347 (serv.man5) Service Manual online
June 2001
■
HIGH SPEED: t
PD
= 4.3 ns (TYP.) at V
CC
= 5V
■
LOW POWER DISSIPATION:
I
I
CC
= 2
µ
A (MAX.) at T
A
=25°C
■
HIGH NOISE IMMUNITY:
V
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
■
POWER DOWN PROTECTION ON INPUTS
■
SYMMETRICAL OUTPUT IMPEDANCE:
|I
|I
OH
| = I
OL
= 8mA (MIN)
■
BALANCED PROPAGATION DELAYS:
t
t
PLH
≅
t
PHL
■
OPERATING VOLTAGE RANGE:
V
V
CC
(OPR) = 2V to 5.5V
■
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08
74 SERIES 08
■
IMPROVED LATCH-UP IMMUNITY
■
LOW NOISE: V
OLP
= 0.8V (MAX.)
DESCRIPTION
The 74VHC08 is an advanced high-speed CMOS
QUAD 2-INPUT AND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
The 74VHC08 is an advanced high-speed CMOS
QUAD 2-INPUT AND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which provides high noise
immunity and stable output.
including buffer output, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHC08
QUAD 2-INPUT AND GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
74VHC08M
74VHC08MTR
TSSOP
74VHC08TTR
TSSOP
SOP
harman/kardon
AVR 347/230, AVR 350/230 Semiconductor Pinouts
Page 7 of 51
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